MLZ2012A3R3W datasheet(13/68 Pages) TI1

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ADS1299EEG-FE Daughter Card Hardware Introduction

By this time the ADS1299EEG FE software will have prompted the user an with error message. Click ‘OK’.

It may be necessary to close the program, power cycle the ADS1299EEG FE and restart the program.

This process may need to be done again should you plug the ADS1299ECG FE into a different USB port

on your computer.

ADS1299EEG-FE Daughter Card Hardware Introduction

CAUTION

Many of the components on the ADS1299EEG-FE are susceptible to damage

by electrostatic discharge (ESD). Customers are advised to observe proper

ESD handling procedures when unpacking and handling the EVM, including the

use of a grounded wrist strap, bootstraps, or mats at an approved ESD

workstation. An electrostatic smock and safety glasses should also be worn.

The ADS1299 ECG front-end evaluation board is configured to be used with the TI MMB0 data converter

evaluation platform. The key features of the ADS1299 system on a chip (SOC) are:

•

Eight integrated INAs and eight 24-bit high-resolution ADCs

•

Low channel noise of 1uVpp for 65Hz bandwidth

•

Low power consumption (5mW/channel)

•

Data rates of 250SPS to 16kSPS

•

5V unipolar or bipolar analog supply, 1.8V to 3.6V digital supply.

•

DC /AC Lead off detection

•

On-chip oscillator

•

On-chip bias amplifier

•

Versatile MUX to enable programmable reference and bias electrode

•

SPI data interface

The ADS1299EEG-FE can be used to evaluate the performance of ADS1299 chip. Users can provide any

type of signal directly to the ADS1299 through a variety of hardware jumper settings (J6, JP25). External

support circuits are provided for testing purposes such as external references, clocks, lead-off resistors,

and shield drive amplifiers.

Figure 13 shows the functional block diagram with important jumper names for the EVM.

SLAU443 – May 2012

EEG Front-End Performance Demonstration Kit

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