LPS331AP datasheet(10/36 Pages) STMICROELECTRONICS

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Digital interfaces

LPS331AP

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Doc ID 022112 Rev 7

Digital interfaces

5.1

I2C serial interface

The registers embedded in the LPS331AP may be accessed through both the I2C and SPI

serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire

interface mode.

The serial interfaces are mapped onto the same pads. To select/exploit the I2C interface, CS

line must be tied high (i.e. connected to Vdd_IO).

5.2

I2C serial interface

The LPS331AP I2C is a bus slave. The I2C is employed to write data into registers whose

content can also be read back.

The relevant I2C terminology is given in Table 8.

There are two signals associated with the I2C bus: the serial clock line (SCL) and the serial

data line (SDA). The latter is a bi-directional line used for sending and receiving the data

to/from the interface. Both lines have to be connected to Vdd_IO through pull-up resistors.

The I2C interface is compliant with fast mode (400 kHz) I2C standards as well as with the

normal mode.

Table 7.

Serial interface pin description

Pin name

Pin description

SPI enable

I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)

SCL/

SPC

I2C serial clock (SCL)

SPI serial port clock (SPC)

SDA/

SDI/

SDO

I2C serial data (SDA)

SPI serial data input (SDI)

3-wire interface serial data output (SDO)

SA0/

SDO

I2C less significant bit of the device address (SA0)

SPI serial data output (SDO)

Table 8.

Serial interface pin description

Term

Description

Transmitter

The device which sends data to the bus

Receiver

The device which receives data from the bus

Master

The device which initiates a transfer, generates clock signals and terminates a

transfer

Slave

The device addressed by the master

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