ISM 868 MHz, 433 MHz and 315 MHz FSK Receiver Cell – Preliminary Data Sheet

ASCell3912

Rev. A, February 2000

Page 3 of 14

Austria Mikro Systeme International AG

TSSOP-20

D_EN

17

WAKEUP

16

RE_INT

15

µC_CLK

14

TEST2

13

TEST1

12

DGND

11

D_CLK

18

DATA

19

DVDD

20

RF+

1

RF-

2

LC+

3

LC-

4

XTAL+

5

XTAL-

6

AVDD

7

AGND

8

GMC

9

RFGND

10

This pin-out is preliminary and will change for the real implementation!

This document contains information on products under development. Austria Mikro Systeme International AG reserves the right to

change or discontinue this product without notice.

1

Functional Description

The Figure 1 shows the block diagram of the ASCell3912. The analog part of the ASCell3912

consists of a direct conversion receiver, a triple band RF synthesizer and the DC-cancellation.

The digital part includes the burst interference resistant protocol decoder the control logic and

the µC interface.

Digital

Power

Supply

XO-SEL

I

Q

LC

+

LC

-

G

M

C

TE

ST

2

D_

CL

K

D_

E

N

DA

TA

VDD

GND

AGND

RF-

AVDD

XTAL+

RF+

XTAL-

DC-Offset

Bandwith

90°

DATA-

RECOVERY

10dB

OSC

PLL

XO

∅-Det

DEM

CTRL

AFC

SYNC

FIR

CLK

GEN

SETUP-

REGISTER

INTERFACE

RF-Power

%

n

RF

Power

Supply

PROTOCOL

DECODER

Scan

Test

XOT[3:0]

XO-CLK

RF-SEL

STATE REGISTER

Functional

Test

1/STR

µC

_C

LK

RE

_I

NT

W

AK

E_

UP

LNA

RFGND

TEST1

Sleeptime

control

Figure 1:

Block diagram of the ASCell3912.

ASCell3912