REV. 0

AD13465

–9–

AMP-IN-X-1

100

100

TO AD8037

AMP-IN-X-2

Figure 2. Single-Ended Input Stage

LOADS

LOADS

ENCODE

10k

10k

ENCODE

10k

10k

Figure 3. ENCODE Inputs

CURRENT MIRROR

CURRENT MIRROR

DR OUT

Figure 4. Digital Output Stage

CURRENT MIRROR

CURRENT MIRROR

D0–D13

100

Figure 5. Digital Output Stage

THEORY OF OPERATION

The AD13465 is a high-dynamic range, 14-bit, 65 MHz pipe-

line delay (three pipelines) analog-to-digital converter. The

custom analog input section provides input ranges of 1 V p-p and

2 V p-p, and input impedance configurations of 50

Ω, 100 Ω,

and 200

Ω.

The AD13465 employs four monolithic ADI components per

channel (AD8037, AD8138, AD8031, and AD6644), along

with multiple passive resistor networks and decoupling capacitors

to fully integrate a complete 14-bit analog-to-digital converter.

In the single-ended input configuration, the input signal is

passed through a precision laser trimmed resistor divider allowing

the user to externally select operation with a full-scale signal of

±0.5 V or ±1.0 V by choosing the proper input terminal for the

application. The result of the resistor divider is to apply a full-scale

input approximately 0.4 V to the noninverting input of the

internal AD8037 amplifier.

The AD13465 analog input includes an AD8037 amplifier

featuring an innovative architecture that maximizes the dynamic

range capability on the amplifier’s inputs and outputs. The

AD8037 amplifier provides a high-input impedance and gain for

driving the AD8138 in a single-ended-to-differential amplifier

configuration. The AD8138 has a –3 dB bandwidth at 300 MHz

and delivers a differential signal with the lowest harmonic

distortion available in a differential amplifier. The AD8138

differential outputs help balance the differential inputs to the

AD6644 maximizing the performance of the device.

The AD8031 provides the buffer for the internal reference

analog-to-digital converter. The internal reference voltage of the

AD6644 is designed to track the offsets and drifts and is used to

ensure matching over an extended temperature range of opera-

tion. The reference voltage is connected to the output common

mode input on the AD8138. This reference voltage sets the

output common mode on the AD8138 at 2.4 V, which is the

midsupply level for the ADC.

The AD6644 has complementary analog input pins, AIN and

AIN. Each analog input is centered at 2.4 V and should swing

± 0.55 V around this reference. Since AIN and AIN are 180

degrees out of phase, the differential analog input signal is 2.2 V

peak-to-peak. Both analog inputs are buffered prior to the first

track-and-hold.

The AD6644 digital outputs drive 100

Ω series resistors (Figure

5.) The result is a 14-bit parallel digital CMOS-compatible

word, coded as two’s complement.

USING THE SINGLE-ENDED INPUT

The AD13465 has been designed with the user’s ease of opera-

tion in mind. Multiple input configurations have been included

on board to allow the user a choice of input signal levels and

input impedance. The standard inputs are

±0.5 V and ±1.0 V.

The user can select the input impedance of the AD13465 on

any input by using the other inputs as alternate locations for the

GND. The following chart summarizes the impedance options

available at each input location.

AMP-IN-X-1 = 100

Ω when AMP-IN-X-2 is open.

AMP-IN-X-1 = 50

Ω when AMP-IN-X-2 is shorted to GND.

AMP-IN-X-2 = 200

Ω when AMP-IN-X-1 is open.

Each channel has two analog inputs AMP-IN-A-1 and AMP-

IN-A-2 or AMP-IN-B-1 and AMP-IN-B-2. Use AMP-IN-A-1