AD13465SLASHPCB datasheet(3/20 Pages) AD

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REV. 0

–3–

AD13465

Test

Mil Sub-

AD13465AZ/BZ

Parameter

Temp

Level

Group

Min

Typ

Max

Unit

SPURIOUS-FREE DYNAMIC RANGE

Analog Input @ 4.98 MHz

°C

dBFS

Analog Input @ 9.9 MHz

°C

dBFS

Full

5, 6

dBFS

Analog Input @ 21 MHz

°C

dBFS

Full

5, 6

dBFS

Analog Input @ 32 MHz

°C

dBFS

Full

dBFS

SINGLE-ENDED ANALOG INPUT

Pass Band Ripple to 10 MHz

°C

0.05

Pass Band Ripple to 25 MHz

°C

0.1

DIFFERENTIAL ANALOG INPUT

Pass Band Ripple to 10 MHz

°C

0.3

Pass Band Ripple to 25 MHz

°C

0.82

TWO-TONE IMD REJECTION

fIN = 9.1 MHz and 10.1 MHz

°C

77.5

dBc

f1 and f2 are –7 dB

Full

5, 6

76.5

fIN = 19.1 MHz and 20.7 MHz

°C

dBc

f1 and f2 are –7 dB

CHANNEL-TO-CHANNEL ISOLATION

°CIV

TRANSIENT RESPONSE

°C

15.3

DIGITAL OUTPUTS

Logic Compatibility

CMOS

DVCC = 3.3 V

Logic 1 Voltage

Full

1, 2, 3

2.5

DVCC – 0.2

Logic 0 Voltage

Full

1, 2, 3

0.2

0.5

DVCC = 5 V

Logic 1 Voltage

Full

DVCC – 0.3

Logic 0 Voltage

Full

0.35

Output Coding

Two’s Complement

POWER SUPPLY

AVCC Supply Voltage

Full

4.85

5.0

5.25

I (AVCC) Current

Full

270

308

AVEE Supply Voltage

Full

–5.25

–5.0

–4.75

I (AVEE) Current

Full

DVCC Supply Voltage

Full

3.135

3.3

3.465

I (DVCC) Current

Full

(Total) Supply Current per Channel

Full

1, 2, 3

369

403

Power Dissipation (Total)

Full

1, 2, 3

3.57

3.9

Power Supply Rejection Ratio (PSRR)

Full

0.02

% FSR/

% VS

NOTES

1Gain tests are performed on AMP-IN-X-1 input voltage range.

2Input capacitance spec. combines AD8037 capacitance and ceramic package capacitance.

3Full Power Bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.

4For differential input: +IN = 1 V p-p and –IN = 1 V p-p (signals are 180

° out of phase). For single ended input: +IN = 2 V p-p and –IN = GND.

5All AC specifications tested by driving ENCODE and

ENCODE differentially. AMP-IN-X-1 = 1 V p-p, AMP-IN-X-2 = GND.

6Minimum and Maximum conversion rates allow for variation in Encode Duty Cycle of 50%

± 5%.

7Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed).

Encode = 65 MSPS. SNR is reported in dBFS, related back to converter full scale.

8Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics.

Encode = 65 MSPS. SINAD is reported in dBFS, related back to converter full scale.

9Analog Input signal power at –1 dBFS; SFDR is ratio of converter full scale to worst spur.

10Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product.

11Channel-to-channel isolation tested with A Channel grounded and a full-scale signal applied to B Channel.

12Digital output logic levels: DV

CC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF will degrade performance.

13Supply voltage recommended operating range. AV

CC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range

AVCC = 5.0 V to 5.25 V.

Specifications subject to change without notice.

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