ACE24C02A

Two-wire Serial EEPROM

VER 1.4

5

AC Characteristics

otherwise noted). Test conditions are listed in Note 2.

Symbol

Parameter

1.7-volt

2.5-volt

5.5-volt

Units

Min Max Min Max Min Max

Clock Frequency, SCL

400

1000

1000

kHz

Clock Pulse Width Low

1.3

0.4

0.4

µs

Clock Pulse Width High

0.6

0.4

0.4

µs

Clock Low to Data Out Valid

0.05 0.9 0.05 0.55 0.05 0.55

µs

1

Time the bus must be free before a new

transmission can Start

1.2

0.5

0.5

µs

Start Hold Time

0.6

0.25

0.25

µs

Start Setup Time

0.6

0.25

0.25

µs

Data In Hold Time

0

0

0

µs

Data In Setup Time

100

100

100

ns

Inputs Rise Time

0.3

0.3

0.3

µs

Inputs Fall Time

300

100

100

ns

Stop Setup Time

0.6

0.25

0.25

µs

Data Out Hold Time

50

50

50

ns

Write Cycle Time

5

5

5

ms

Endurance

(1)

3.3V, 25℃, Page Mode

1,000,000

Write

Cycles

Notes:1. This parameter is characterized and not 100% tested.

2.AC measurement conditions:

RL (connects to Vcc): 1.3k

Ω

Input pulse voltages: 0.3 Vcc to 0.7 Vcc

Input rise and fall times: ≦50 ns

Input and output timing reference voltages: 0.5Vcc

Device Operation

Clock and Data Transitions:

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only

during SCL low time periods (refer to Figure 4). Data changes during SCL high periods will indicate a

start or stop condition as defined below.

Start Condition:

A high-to-low transition of SDA with SCL high is a start condition which must precede any other

command (refer to Figure 5).