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ARA2004 数据表(PDF) 12 Page - ANADIGICS, Inc |
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ARA2004 数据表(HTML) 12 Page - ANADIGICS, Inc |
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12 / 21 page ![]() 12 Data Sheet- Rev 2.2 04/2011 ARA2004 table 6: programming Register loGic pRoGRAMMinG table 7: Data Description programming instructions The programming word is set through an 8 bit shift register via the data, clock and enable lines. The data is entered in order with the most significant bit (MSB) first and the least significant bit (LSB) last. The enable line must be low for the duration of the data entry, then set high to latch the shift register. The rising edge of the clock pulse shifts each data value into the register. Software is Available from ANADIGICS Application Engineering to set the data bits through the serial cable on the ARA2004 evaluation board. VAlue function (1 = on, 0 = bypass) P7 N/A P6 N/A P5 32 dB Atenuator Bit P4 16 dB Attenuator Bit P3 8 dB Attenuator Bit P2 4 dB Attenuator Bit P1 2 dB Attenuator Bit P0 1 dB Attenuator Bit DAtA Bit D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 function P7 P6 P5 P4 P3 P2 P1 P0 |
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