AD6640STSLASHPCB datasheet(19/24 Pages) AD

19 / 24 page

AD6640

REV. 0

–19–

System Requirements

Figure 46 shows a typical wideband receiver subsystem based

around the AD6640. This strip consists of a wideband IF filter,

amplifier, ADC, latches, channelizer and interface to a digital

signal processor. This design shows a typical clocking scheme

used in many receiver designs. All timing within the system is

referenced back to a single clock. While this is not necessary, it

does facilitate PLL design, ease of manufacturing, system test,

and calibration. Keeping in mind that the overall performance

goal is to maintain the best possible dynamic range, many con-

siderations must be made.

One of the biggest challenges is selecting the amplifier used to

drive the AD6640. Since this is a communications application,

it is common to directly sample an intermediate frequency (IF)

signal. As such, IF gain blocks can be implemented instead of

baseband op amps. For these gain block amplifiers, the critical

specifications are third order intercept point and noise figure. A

bandpass filter will remove harmonics generated within the

amplifier, but intermods should be better than the performance

of the A/D converter. In the case of the AD6640, amplifier

intermods must be better than –80 dBFS when driving full-

scale power. As mentioned earlier, there are several amplifiers

to choose from and the specifications depend on the end

application. Figure 47 shows a typical multitone test.

FREQUENCY – MHz

–80

–120

–40

–100

–20

–60

32.5

6.5

13.0

19.5

26.0

ENCODE = 65MSPS

Figure 47. Multitone Performance

Two other key considerations for the digital wideband receiver

are converter sample rate and IF frequency range. Since per-

formance of the AD6640 converter is largely independent of

both sample rate and analog input frequency (Figures 10, 11

and 16), the designer has greater flexibility in the selection of

these parameters. Also, since the AD6640 is a bipolar device,

power dissipation is not a function of sample rate. Thus there is

no penalty paid in power by operating at faster sample rates. All

of this is good because, by carefully selecting input frequency

range and sample rate, some of the drive amplifier and ADC

harmonics can actually be placed out-of-band.

For example, if the system has second and third harmonics that

are unacceptably high, by carefully selecting the encode rate and

signal bandwidth, these second and third harmonics can be

placed out-of-band. For the case of an encode rate equal to

60 MSPS and a signal bandwidth of 7.5 MHz, placing the fun-

damental at 7.5 MHz places the second and third harmonics out

of band as shown in the table below.

Table II.

Encode Rate

60 MSPS

Fundamental

7.5 MHz–15 MHz

Second Harmonic

15 MHz–30 MHz

Third Harmonic

22.5 MHz–30 MHz, 30 MHz–15 MHz

Another option can be found through bandpass sampling. If the

analog input signal range is from dc to FS/2, then the amplifier

and filter combination must perform to the specification re-

quired. However, if the signal is placed in the third Nyquist

zone (FS to 3 FS/2), the amplifier is no longer required to meet

the harmonic performance required by the system specifications

since all harmonics would fall outside the passband filter. For

example, the passband filter would range from FS to 3 FS/2.

The second harmonic would span from 2 FS to 3 FS, well out-

side the passband filter’s range. The burden then has been passed

off to the filter design provided that the ADC meets the basic

specifications at the frequency of interest. In many applications,

this is a worthwhile tradeoff since many complex filters can

easily be realized using SAW and LCR techniques alike at these

relatively high IF frequencies. Although harmonic performance

of the drive amplifier is relaxed by this technique, intermodula-

tion performance cannot be sacrificed since intermods must be

assumed to fall in-band for both amplifiers and converters.

Noise Floor and SNR

Oversampling is sampling at a rate that is greater than twice the

bandwidth of the signal desired. Oversampling does not have

anything to do with the actual frequency of the sampled sig-

nal, it is the bandwidth of the signal that is key. Bandpass or

“IF” sampling refers to sampling a frequency that is higher than

Nyquist and often provides additional benefits such as down

conversion using the ADC and replacing a mixer with a track-

and-hold. Oversampling leads to processing gains because the

PRESELECT

FILTER

LNA

5–15MHz

PASSBAND

348

CMOS

BUFFER

D11

+3.3V (D)

+5V (A)

AD6640

AIN

ENCODE

M/N PLL

SYNTHESIZER

DRIVE

REF

1900MHz

REFERENCE

CLOCK

65.00MHz

AD6620

(REF. FIG 45)

I & Q

DATA

CLK

ADSP-2181

NETWORK

CONTROLLER

INTERFACE

AIN

Figure 46. Simplified Wideband PCS Receiver

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