REV. 0

AD7708/AD7718

–25–

Communications Register (A3, A2, A1, A0 = 0, 0, 0, 0)

The Communications Register is an 8-bit write-only register. All communications to the part must start with a write operation to the

Communications Register. The data written to the Communications Register determines whether the next operation is a read or write

operation, the type of read operation, and on which register this operation takes place. For read or write operations, once the subse-

quent read or write operation to the selected register is complete, the interface returns to where it expects a write operation to the

Communications Register. This is the default state of the interface and, on power-up or after a

RESET, the AD7708/AD7718 is in

this default state waiting for a write operation to the Communications Register. In situations where the interface sequence is lost, a

write operation of at least 32 serial clock cycles with DIN high returns the AD7708/AD7718 to this default state by resetting the part.

Table XII outlines the bit designations for the Communications Register. CR0 through CR7 indicate the bit location, CR denoting

the bits are in the Communications Register. CR7 denotes the first bit of the data stream.

7

R

C6

R

C5

R

C4

R

C3

R

C2

R

C1

R

C0

R

C

N

E

W

)

0

(

/

R

W

)

0

()

0

(

0)

0

(

0)

0

(

3

A)

0

(

2

A)

0

(

1

A)

0

(

0

A

Table XII. Communications Register Bit Designations

Bit

Bit

Location

Mnemonic

Description

CR7

WEN

Write Enable Bit. A 0 must be written to this bit so the write operation to the Communications Register

actually takes place. If a 1 is written to this bit, the part will not clock on to subsequent bits in the regis

ter. It will stay at this bit location until a 0 is written to this bit. Once a 0 is written to the

WEN bit, the

next seven bits will be loaded to the Communications Register.

CR6

R/

W

A zero in this bit location indicates that the next operation will be a write to a specified register. A one in

this position indicates that the next operation will be a read from the designated register.

CR5

0

A zero must be written to this bit position to ensure correct operation of the AD7708/AD7718.

CR4

0

A zero must be written to this bit position to ensure correct operation of the AD7708/AD7718.

CR3–CR0

A3–A0

Register Address Bits. These address bits are used to select which of the AD7708/AD7718’s registers are

being accessed during this serial interface communication. A3 is the MSB of the three selection bits.

Table XIII. Register Selection Table

A3

A2

A1

A0

Register

0000Communications Register during a Write Operation

0000

Status Register during a Read Operation

0001Mode Register

0010

ADC Control Register

0011

Filter Register

0100

ADC Data Register

0101

ADC Offset Register

0110

ADC Gain Register

0111I/O Control Register

1000Undefined

1001Undefined

1010Undefined

1011Undefined

1100Test 1 Register

1101Test 2 Register

1110Undefined

1111ID Register