2

–21–

REV. C

AD7713

SDATA (O)

SCLK (I)

3-STATE

RFS (I)

A0 (I)

MSB

LSB

DRDY (O)

Figure 12a. External Clocking Mode, Output Data Read Operation

3-STATE

MSB

BIT N

BIT N+1

SDATA (O)

SCLK (I)

RFS (I)

A0 (I)

DRDY (O)

Figure 12b. External Clocking Mode, Output Data Read Operation (RFS Returns High During Read Operation)

RFS

, the next bit (BIT N + 1) may appear on the databus be-

fore RFS goes high. When RFS returns low again, it activates

the SDATA output. When the entire word is transmitted, the

DRDY

line will go high, turning off the SDATA output as per

Figure 12a.

Write Operation

Data can be written to either the control register or calibration

registers. In either case, the write operation is not affected by

the DRDY line, and the write operation does not have any effect

on the status of DRDY. A write operation to the control regis-

ter or the calibration register must always write 24 bits to the re-

spective register.

Figure 13a shows a write operation to the AD7713 with TFS

remaining low for the duration of the write operation. A0 deter-

mines whether a write operation transfers data to the control

register or to the calibration registers. This A0 signal must

remain valid for the duration of the serial write operation. As

before, the serial clock line should be low between read and

write operations. The serial data to be loaded to the AD7713

must be valid on the high level of the externally applied SCLK

signal. Data is clocked into the AD7713 on the high level of this

SCLK signal with the MSB transferred first. On the last active

high time of SCLK, the LSB is loaded to the AD7713.

Figure 13b shows a timing diagram for a write operation to the

AD7713 with TFS returning high during the write operation

and returning low again to write the rest of the data word. Tim-

ing parameters and functions are very similar to that outlined for

Figure 13a, but Figure 13b has a number of additional times to

show timing relationships when TFS returns high in the middle

of transferring a word.

SCLK (I)

SDATA (I)

TFS (I)

A0 (I)

MSB

LSB

Figure 13a. External Clocking Mode, Control/Calibration Register Write Operation