AD810

REV. A

–13–

of the disable the disable pin for

±5 V supplies. If driven by

complementary output CMOS logic (such as the 74HC04), the

disable time (until the output goes high impedance) is about

100 ns and the enable time (to low impedance output) is about

170 ns on

±5 V supplies. The enable time can be extended to

about 750 ns by using open drain logic such as the 74HC05.

When operated on

±15 V supplies, the AD810 disable pin may

be driven by open drain logic such as the 74C906. In this case,

adding a 10 k

Ω pull-up resistor from the disable pin to the plus

supply will decrease the enable time to about 150 ns. If there is

a nonzero voltage present on the amplifier's output at the time it

is switched to the disabled state, some additional decay time will

be required for the output voltage to relax to zero. The total

time for the output to go to zero will generally be about 250 ns

and is somewhat dependent on the load impedance.

OPERATION AS A VIDEO LINE DRIVER

The AD810 is designed to offer outstanding performance at

closed-loop gains of one or greater. At a gain of 2, the AD810

makes an excellent video line driver. The low differential gain

and phase errors and wide –0.1 dB bandwidth are nearly

independent of supply voltage and load (as seen in Figures 49

and 50).

AD810

75

Ω

7

3

2

3

0.1µF

6

4

0.1µF

715

Ω

75

Ω

CABLE

75

Ω

75

Ω

75

Ω

CABLE

715

Ω

Figure 47. A Video Line Driver Operating at a Gain of +2

GAIN = +2

±2.5V

±5V

±2.5V

PHASE

GAIN

0

–5

10

100

–1

–2

–3

–4

1

1

1000

0

–45

–90

–135

–180

–225

–270

FREQUENCY – MHz

±5V

Figure 48. Closed-Loop Gain and Phase vs. Frequency,

0.10

0

15

0.03

0.01

6

0.02

5

0.06

0.04

0.05

0.07

0.08

0.09

14

13

12

11

10

9

8

7

0.20

0.18

0.16

0.14

0.12

0.10

0.08

0.06

0.04

0.02

0

GAIN

PHASE

GAIN = +2

100 IRE

MODULATED RAMP

SUPPLY VOLTAGE – ± Volts

Figure 49. Differential Gain and Phase vs. Supply Voltage

100k

1M

100M

10M

+0.1

0

–0.1

–0.1

0

+0.1

FREQUENCY – Hz

±15V

±5V

±15V

±5V

±2.5

±2.5

Figure 50. Fine-Scale Gain (Normalized) vs. Frequency

110

40

20

2

30

70

50

60

80

90

100

18

16

14

12

10

8

6

4

SUPPLY VOLTAGE - ±Volts

PEAKING

1.0dB

PEAKING

0.1dB

G = +2

≤

≤

Figure 51. –3 dB Bandwidth vs. Supply Voltage,