AD8150AST datasheet(21/35 Pages) AD

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AD8150

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external pin of the AD8150 projects into the package, and has a

bond wire connected to the chip inside. On-chip wiring then

connects to the collectors of the output transistors and to ESD

protection diodes.

Unlike some other high-speed digital components, the AD8150

does not have on-chip terminations. While this location would

be closer to the actual end of the transmission line for some

architectures, this concept can limit system design options. In

particular, it is not possible to bus more than two inputs or

outputs on the same transmission line and it is also not possible

to change the value of these terminations to use for different

impedance transmission lines. The AD8150, with the added

ability to disable its outputs, is much more versatile in these

types of architectures.

If the external traces are kept to a bare minimum, then the out-

put will present a mostly lumped capacitive load of about 2 pF.

A single stub of 2 pF will not seriously adversely affect signal in-

tegrity for most transmission lines, but the more of these stubs,

the more adverse their influence will be.

One way to mitigate this effect is to locally reduce the capacitance

of the main transmission line near the point of stub intersection.

Some practical means for doing this are to narrow the PC board

traces in the region of the stub and/or to remove some of the

ground plane(s) near this intersection. The effect of these tech-

niques will locally lower the capacitance of the main transmission

line at these points, while the added capacitance of the AD8150

outputs will “compensate” for this reduction in capacitance.

The overall intent is to create as uniform a transmission line as

possible.

In selecting the location of the termination resistors it is impor-

tant to keep in mind that, as their name implies, they should be

placed at either end of the line. There should be no or minimal

projection of the transmission line beyond the point where the

termination resistors connect to it.

EVALUATION BOARD

An evaluation board has been designed and is available to rapidly

test the main features of the AD8150. This board lets the user

analyze the analog performance of the AD8150 channels and

easily control the conﬁguration of the board by a standard PC.

Differential inputs and outputs provide the interface for all chan-

nels with the connections made by a 50

Ω, SMB-type connector.

This type of connector was chosen for its rapid mating and

unmating action. The use of SMB-type connectors minimizes

the size and minimizes the effort of rearranging interconnects

that would be required by using connectors such as SMA-type.

Conﬁguration Programming

The board is conﬁgurable by one of two methods. For ease of

use, custom software is provided that controls the AD8150

programming via the parallel port of a PC. This requires a user-

supplied standard printer cable that has a DB-25 connector at

one end (parallel- or printer-port interface) and a Centronix-

type connector at the other that connects to P2 of the AD8150

evaluation board. The programming with this scheme is done in

a serial fashion, so it is not the fastest way to conﬁgure the AD8150

matrix. However, the user interface makes it very convenient to

use this programming method.

If a high-speed programming interface is desired, the AD8150

address and data buses are directly available on P3. The source

of the program signals can be a piece of test equipment, like the

Tektronix HFS-9000 digital test generator, or some other user-

supplied hardware that generates programming signals.

When using the PC interface, the jumper at W1 should be in-

stalled and no connections should be made to P3. When using

the P3 interface, no jumper is installed at W1. There are loca-

tions for termination resistors for the address and data signals if

these are necessary.

Power Supplies

The AD8150 is designed to work with standard ECL logic levels.

This means that VCC is at ground and VEE is at a negative sup-

ply. The shells of the I/O SMB connectors are at VCC potential.

Thus, when operating in the standard ECL conﬁguration, test

equipment can be directly connected to the board, as the test

equipment will have its connector “shells” at ground potential also.

Operating in PECL mode requires VCC to be at a positive volt-

age, while VEE is at ground. Since this would make the shells of

the I/O connectors at a positive voltage, it can cause problems

when directly connecting to test equipment. Some equipment,

such as battery operated oscilloscopes, can be “floated” from

ground, but care should be taken with line-powered equipment

such that a dangerous situation is not created. Refer to the manual

of the test equipment that is being used.

The voltage difference from VCC to VEE can range from 3 V to 5 V.

Power savings can be realized by operating at a lower voltage

without any compromise in performance.

A separate connection is provided for VTT, the termination po-

tential of the outputs. This can be at a voltage as high as VCC,

but power savings can be realized if VTT is at a voltage that is

somewhat lower. Please consult elsewhere in the data sheet for

the speciﬁcation for the limits of the VTT supply.

As a practical matter, current on the evaluation board will flow

from the VTT supply, through the termination resistors and then

through the AD8150 from its outputs to the VEE supply. When

running in ECL mode, VTT will want to be at a negative supply.

Most power supplies will not allow their ground to connect to

VCC and then the negative supply to VTT. This will require them

to source current from their negative supply, which will not re-

turn to the ground terminal. Thus, VTT should be referenced to

VEE when running in ECL mode or a true bipolar supply should

be used.

The digital supply is provided to the AD8150 by the VDD and

VSS pins. VSS should always be at ground potential to make it com-

patible with standard CMOS or TTL logic. VDD can range from

3 V to 5 V and should be matched to the supply voltage of the

logic used to control the AD8150. However, since PCs use 5 V

logic on their parallel port, VDD should be at 5 V when using a

PC to program the AD8150.

Software Installation

The software to operate the AD8150 is provided on two 3.5"

floppy disks. The software is installed by inserting Disk 1 into

the floppy drive of a PC and running the “setup.exe” program.

This will routinely install the software and prompt the user when to

change to Disk 2. The setup program will also prompt the user

to select the directory location to store the program.

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