AD8170/AD8174

–9–

REV. 0

Equation 4 can be used to calculate expected gain error due to

the current feedback amplifier’s finite transimpedance and

common mode rejection. For low gains and recommended

feedback resistors, this will be typically less than 0.4%. For

most applications with gain greater than 1, the dominant source

of gain error will most likely be the ratio-match of the external

resistors. All of the dominant contributors to gain error are

associated with the buffer amplifier and external resistors.

These do not change as different channels are selected, so

channel-to-channel gain match of less than 0.05% is easily

attained.

G

= 1+



































1

− CMRR

[]

(4)

↑

↑

Ideal Gain

Error Terms

Ω

≅ 100 Ω

CMRR = Amplifier Common-Mode Rejection

≅ –52 dB

Choice of External Resistors

The gain and bandwidth of the multiplexer are determined by

the closed-loop gain and bandwidth of the onboard current

feedback amplifier. These both may be customized by the

external resistor feedback network. Table III shows typical

bandwidths at some common closed loop gains for given

frequency response must be maintained. The resistors recom-

mended in the table result in the widest 0.1 dB bandwidth with

the least peaking. 1% resistors are recommended for applications

requiring the best control of bandwidth. Packaging parasitics vary

between DIP and SOIC packages, which may result in a slightly

different resistor value for optimum frequency performance.

Wider bandwidths than those listed in the table can be attained

To estimate the –3 dB bandwidth for feedback resistors not

listed in Table III, the following single-pole model for the

current feedback amplifier may be used:

G

1

+ sC

T

()

0.8 pF

G = Ideal Closed Loop Gain

≅ 100 Ω

The –3 dB bandwidth is determined from this model as:

1

2

π C

T

()

This model is typically good to within 15%.

Table III. Recommended Component Values

Small Signal

Large Signal

AD8170R +1

1 k

—

710

270

+2

499

499

250

290

+10

499

54.9

50

55

+20

499

26.3

27

27

AD8174R +1

1 k

—

780

270

+2

549

549

235

280

+10

499

54.9

50

55

+20

499

26.3

27

27

Capacitive Load

The general rule for current feedback amplifiers is that the

higher the load capacitance, the higher the feedback resistor

required for stable operation. For the best combination of wide

bandwidth and clean pulse response, a small output resistor is

also recommended, as shown in Figure 24. Table IV contains

values of feedback and series resistors that result in the best

pulse response for a given load capacitance.

SWITCH

50

Ω

0.1µF

10µF

BUFFER

0.1µF

10µF

(TO FET PROBE)

Figure 24. Circuit for Driving a Capacitive Load

Table IV. Recommended Feedback and Series Resistors and Bandwidth vs. Capacitive Load and Gain

G = +1

G = +2

G = +3

G

+4

–3 dB BW

–3 dB BW

(pF)

( )( )

(MHz)

( )( )

(MHz)

( )( )

(MHz)

( )( )

20

1 k

50

149

1 k

20

174

499

25

170

499

20

50

1 k

30

104

1 k

15

117

1 k

15

98

499

20

100

2k

20

73

1 k

15

80

1 k

15

71

499

15

300

2k

20

27

1 k

15

34

1 k

15

33

499

15