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AD8320ARP 数据表(PDF) 8 Page - Analog Devices

部件名 AD8320ARP
功能描述  Serial Digital Controlled Variable Gain Line Driver
PDF  20 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD8320ARP 数据表(HTML) 8 Page - Analog Devices

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AD8320
–8–
REV. 0
5V
VCC = 12V
MAX GAIN
VIN = 0V p-p
5V
75nsec
PD
VOUT
100mV
Figure 31. Power-Up/Power-Down
Glitch
5V
1V
VCC = 12V
F = 40MHz
MAX GAIN
20nsec
VOUT
2.50V
VIN
Figure 34. Overload Recovery
FREQUENCY – Hz
80
100k
1G
1M
10M
100M
60
50
VCC = 5V
RT = 115
70
40
Figure 37. Input Impedance vs.
Frequency
5V
500mV
VCC = 5V
F = 40MHz
MAX GAIN
20nsec
VOUT
1.25V
VIN
Figure 33. Overload Recovery
5V
VCC = 12V, F = 40MHz
MIN TO MAX GAIN
VIN = .310V p-p
20nsec
VOUT
2.50V
DATEN
Figure 36. Output Settling Time Due
to Gain Change
TEMPERATURE – C
120
0
–50
–25
100
80
60
40
20
VCC = 12V, PD = 0
VCC = 12V, PD = 1
VCC = 5V, PD = 0
VCC = 5V, PD = 1
0
25
50
75
100
Figure 39. Supply Current vs.
Temperature
5V
VCC = 12V
MAX GAIN
VIN = 0V p-p
5V
250nsec
DATEN
VOUT
5mV
CLK
Figure 32. Clock Feedthrough
VCC = 12V, F = 40MHz
MAX GAIN
250mV
20nsec
VOUT
2.00V
VIN
Figure 35. Output Settling Time Due
to Input Change
FREQUENCY – Hz
80
100k
1M
10M
100M
60
50
70
90
VCC = 12V, PD = 0
VCC = 12V, PD = 1
VCC = 5V, PD = 0
VCC = 5V, PD = 1
Figure 38. Output Impedance vs.
Frequency



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