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AD9042STPCB 数据表(PDF) 2 Page - Analog Devices |
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AD9042STPCB 数据表(HTML) 2 Page - Analog Devices |
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2 / 24 page  DC SPECIFICATIONS Test AD9042AST Test AD9042AD Parameter Temp Level Min Typ Max Level Min Typ Max Units RESOLUTION 12 12 Bits DC ACCURACY No Missing Codes Full VI Guaranteed VI Guaranteed Offset Error Full VI –10 ±3 +10 VI –10 ±3 +10 mV Offset Tempco Full V 25 V 25 ppm/ °C Gain Error Full VI –6.5 0 +6.5 VI –6.5 0 +6.5 % FS Gain Tempco Full V –50 V –50 ppm/ °C REFERENCE OUT (VREF) 2 +25 °C V 2.4 V 2.4 V ANALOG INPUT (AIN) Input Voltage Range VREF ±0.500 VREF ±0.500 V Input Resistance Full IV 200 250 300 IV 200 250 300 Ω Input Capacitance +25 °C V 5.5 V 7 pF ENCODE INPUT 3 Logic Compatibility 4 TTL/CMOS TTL/CMOS Logic “1” Voltage Full VI 2.0 5.0 VI 2.0 5.0 V Logic “0” Voltage Full VI 0 0.8 VI 0 0.8 V Logic “1” Current (VINH = 5 V) Full VI 450 625 800 VI 450 625 800 µA Logic “0” Current (VINL = 0 V) Full VI –400 –300 –200 VI –400 –300 –200 µA Input Capacitance +25 °C V 2 V 2.5 pF DIGITAL OUTPUTS Logic Compatibility CMOS CMOS Logic “1” Voltage (IOH = 10 µA) +25 °C I 3.5 4.2 I 3.5 4.2 V Full IV 3.5 IV 3.5 V Logic “0” Voltage (IOL = 10 µA) +25 °C I 0.75 0.80 I 0.75 0.80 V Full IV 0.85 IV 0.85 V Output Coding Twos Complement Twos Complement POWER SUPPLY AVCC Supply Voltage Full VI 5.0 VI 5.0 V I (AVCC) Current Full V 109 V 109 mA DVCC Supply Voltage Full VI 5.0 VI 5.0 V I (DVCC) Current Full V 10 V 10 mA ICC (Total) Supply Current Full VI 119 147 VI 119 147 mA Power Dissipation Full VI 595 735 VI 595 735 mW Power Supply Rejection +25 °C I –20 ±1 +20 I –20 ±1 +20 mV/V (PSRR) Full V ±5V ±5 mV/V NOTES 1C1 (Pin 10 on AD9042AST only) tied to GND through 0.01 µF capacitor. 2V REF is normally tied to VOFFSET through 50 Ω. If VREF is used to provide dc offset to other circuits, it should first be buffered. 3ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 µF capacitor. 4ENCODE may also be driven differentially in conjunction with ENCODE; see “Encoding the AD9042” for details. Specifications subject to change without notice. SWITCHING SPECIFICATIONS Test AD9042AST Test AD9042AD Parameter (Conditions) Temp Level Min Typ Max Level Min Typ Max Units Maximum Conversion Rate Full VI 41 VI 41 MSPS Minimum Conversion Rate Full IV 5 IV 5 MSPS Aperture Delay (tA) +25 °C V –250 V –250 ps Aperture Uncertainty (Jitter) +25 °C V 0.7 V 0.7 ps rms ENCODE Pulse Width High +25 °C IV10 IV10 ns ENCODE Pulse Width Low +25 °C IV10 IV10 ns Output Delay (tOD) Full IV 5 9 14 IV 5 9 14 ns NOTE 1C1 (Pin 10 on AD9042AST only) tied to GND through 0.01 µF capacitor. REV. A (AVCC = DVCC = +5 V; VREF tied to VOFFSET through 50 Ω; T MIN = –40 C, TMAX = +85 C) 1 –2– (AVCC = DVCC = +5 V; ENCODE & ENCODE = 41 MSPS; VREF tied to VOFFSET through 50 Ω; T MIN = –40 C, TMAX = +85 C) 1 AD9042–SPECIFICATIONS |
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