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AD9070/PCB 数据表(PDF) 5 Page - Analog Devices |
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AD9070/PCB 数据表(HTML) 5 Page - Analog Devices |
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5 / 16 page ![]() AD9070 –5– REV. B PIN FUNCTION DESCRIPTIONS Pin Numbers AD9070BR AD9070DIP R Package D Package Name Function 1, 7, 12, 21, 23 1, 7, 9, 14, 21 VEE Negative Power Supply. Nominally –5.0 V. 2, 8, 11, 20, 22 2, 6, 8, 10, 13, 15, 22 GND Ground. 3 N/A VREF OUT Internal Reference Output (–2.5 V typical); Bypass with 0.1 µF to Ground. 4 3 VREF IN Reference Input for ADC (–2.5 V typical). 5 N/A COMP Internal Amplifier Compensation, 0.1 µF to V EE. 6 N/A REF BYPASS Reference Bypass Node, 0.1 µF to V EE. 94 AIN Analog Input – Complement. 10 5 AIN Analog Input – True. 13 11 ENCODE Encode Clock for ADC (ADC Samples on Rising Edge of ENCODE). 14 12 ENCODE Encode Clock Complement (ADC Samples on Falling Edge of ENCODE). 28–24, 19–15 27–23, 20–16 D9–D0 Digital Outputs of ADC. D9 is the MSB. Data is twos complement. N/A 28 OR Out-of-Range Output. Goes HIGH when the converted sample is more positive than 1FFh or more negative than 200h (Twos Complement Coding). PIN CONFIGURATIONS SOIC Ceramic DIP 14 13 12 11 10 9 8 2 3 4 7 6 5 1 17 16 15 20 19 18 28 27 26 25 24 23 22 21 TOP VIEW (Not to Scale) AD9070BR D9 (MSB) D8 D7 D6 D5 VEE GND VEE GND D4 D3 D2 D1 D0 (LSB) VEE GND VREF OUT VREF IN COMP REF BYPASS VEE GND AIN AIN GND VEE ENCODE ENCODE 14 13 12 11 10 9 8 2 3 4 7 6 5 1 17 16 15 20 19 18 28 27 26 25 24 23 22 21 TOP VIEW (Not to Scale) AD9070DIP OR D9 (MSB) D8 D7 D6 D5 GND VEE D4 D3 D2 D1 D0 (LSB) GND VEE GND VREF IN AIN AIN GND VEE GND VEE GND ENCODE ENCODE GND VEE |
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