AD9775EB datasheet(19/48 Pages) AD

19 / 48 page

REV. 0

AD9775

–19–

The offset control defines a small current that can be added to

IOUTA or IOUTB (not both) on the IDAC and QDAC. The selec-

tion of which IOUT this offset current is directed toward is

programmable via Register 08h, Bit 7 (IDAC) and Register 0Ch,

Bit 7 (QDAC). Figure 8 shows the scale of the offset current

that can be added to one of the complementary outputs on the

IDAC and QDAC. Offset control can be used for suppression of

LO leakage resulting from modulation of dc signal components.

If the AD9775 is dc-coupled to an external modulator, this

feature can be used to cancel the output offset on the AD9775

as well as the input offset on the modulator. Figure 9 shows a

typical example of the effect that the offset control has on LO

suppression.

OFFSET

DAC

QDAC

IDAC

OFFSET

DAC

REFIO

0.1 F

FSADJ1

FSADJ2

RSET1

RSET2

IOUTA1

IOUTB1

OFFSET

CONTROL

REGISTERS

IOUTA2

IOUTB2

GAIN

CONTROL

REGISTERS

COARSE

GAIN

DAC

COARSE

GAIN

DAC

FINE

GAIN

DAC

FINE

GAIN

DAC

1.2VREF

GAIN

CONTROL

REGISTERS

OFFSET

CONTROL

REGISTERS

Figure 6. DAC Outputs, Reference Current Scaling, and

Gain/Offset Adjust

COARSE GAIN REGISTER CODE – Assuming

RSET1, 2 = 1.9k

2R MODE

1R MODE

Figure 7a. Coarse Gain Effect on IFULLSCALE

FINE GAIN REGISTER CODE – Assuming

RSET1, 2 = 1.9k

–3.0

2R MODE

1R MODE

–2.5

–2.0

–1.5

–1.0

–0.5

Figure 7b. Fine Gain Effect on IFULLSCALE

In Figure 9, the negative scale represents an offset added to

IOUTB, while the positive scale represents an offset added to

IOUTA of the respective DAC. Offset Register 1 corresponds to

IDAC, while Offset Register 2 corresponds to QDAC. Figure 9

represents the AD9775 synthesizing a complex signal that is then

dc-coupled to an AD8345 quadrature modulator with an LO of

800 MHz. The dc-coupling allows the input offset of the

AD8345 to be calibrated out as well. The LO suppression at

the AD8345 output was optimized first by adjusting Offset

(roughly Code 54), this code was held in Offset Register 1, and

Offset Register 2 was adjusted. The resulting LO suppression

is 70 dBFS. These are typical numbers and the specific code for

optimization will vary from part to part.

COARSE GAIN REGISTER CODE – Assuming

RSET1, 2 = 1.9k

200

400

600

800

2R MODE

1R MODE

1000

Figure 8. DAC Output Offset Current

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