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ADMC201 数据表(PDF) 13 Page - Analog Devices |
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ADMC201 数据表(HTML) 13 Page - Analog Devices |
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13 / 15 page ![]() ADMC201 REV. B –13– Table VII. SYSCTRL Analog Input Channel Selection Bit 3 Bit 4 Channels Converted Mode 0 0 V, W (Default) Two-/Three-Phase 0 1 V, W, AUX Two-/Three-Phase 1 0 U, V, W Three-/Three-Phase 1 1 U, V, W, AUX Three-/Three-Phase Bit 0, 1 Auxiliary Channel Selection. Bit 3 Channel U Conversion Enable. If Bit 3 is set to 1, then Channel U will be converted along with V, W and/or AUX. This bit selects three-/three-phase mode. Bit 4 Aux Channel Conversion Enable. If Bit 4 is set to 1, then the AUX input will be converted along with the channels V, W and/or U. Bit 5 If Bit 5 = 1, then the external clock will be divided by two to derive the system clock. If the external clock frequency is greater than 12.5 MHz, then this bit must be set. Bit 6 Park Interrupt Enable. This bit allows interrupts to be generated when the Park rotation is completed. Bit 7 ADC Interrupt Enable. This bit allows interrupts to be generated when the analog-to-digital conversion process is complete. Bit 8 IRQ Pin Format—Edge or Level Interrupt Selection. If Bit 8 is set to 0, then an interrupt will cause a pulse of one system clock to be generated on the IRQ pin. If Bit 8 is set to 1, then an interrupt causes the IRQ output to go LOW (logic 0). The IRQ output pin will remain LOW until the SYSSTAT register is read. Bit 10 If Bit 10 is set to 1, then the reverse Park transforma- tion will be formed in 3/3 mode. For Forward transformations, this bit must be set to 1. Table V. System Control (SYSCTRL) Registers RESET Bit Function Default 0 Auxiliary Channel Selection 0 1 Auxiliary Channel Selection 0 3 Enables U Channel Conversion (1 = Enable) Two-/Three-Phase Mode 0 4 Enables AUX Channel Conversion (0 = Disable, 1 = Enable) 0 5 Divide External Clock by 2 (0 = No, 1 = Yes) 0 6 Park Interrupt Enable 0 7 ADC Interrupt Enable (0 = Disable, 1 = Enable) 0 8 IRQ Pin Format (Edge or Level Based Interrupt Requests) (0 = Edge) 0 10 Reverse Rotation (0 = 2/3, 1 = 3/3) 0 Forward Rotation (1 = Enable) Table VI. SYSCTRL Auxiliary Channel Selection Bit 0 Bit 1 Auxiliary Channels Converted 0 0 AUX0 0 1 AUX1 1 0 AUX2 1 1 AUX3 |
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