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ADP3342 数据表(PDF) 2 Page - Analog Devices

部件名 ADP3342
功能描述  Ultralow, IQ, anyCAP Low Dropout Regulator
PDF  8 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP3342 数据表(HTML) 2 Page - Analog Devices

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REV. 0
–2–
ADP3342–SPECIFICATIONS
(VCC = 3.0 V, VIN = 1.8 V, CIN = COUT = 1 F, TA = 0 C to 100 C and TA = –40 C to
+100 C, unless otherwise noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OUTPUT
Voltage Accuracy
VOUT
VCC = 2.8 V to 6 V, VIN = 1.7 V to 6 V
–4.0
+4.0
%
IL = 0.1 mA to 300 mA
TA = 25
°C
VCC = 2.8 V to 6 V, VIN = 1.7 V to 6 V
–5.0
+5.0
%
IL = 0.1 mA to 300 mA,
TA = –40
°C to +100°C
Line Regulation
VCC = 2.8 V to 6 V, VIN = 1.7 V to 6 V
0.04
mV/V
TA = 25
°C
Load Regulation
IL = 0.1 mA to 300 mA
0.12
mV/mA
TA = 25
°C
Dropout Voltage
VDROP
VOUT = 98% of VOUTNOM
IL = 300 mA
190
450
mV
IL = 200 mA
125
mV
IL = 100 mA
70
mV
Current Limiting
ILIM
VCC = 3 V, VIN = 1.8 V
450
mA
Output Noise
VNOISE
f = 10 Hz–100 kHz, CL = 1
µF60
µV rms
IL = 300 mA
OPERATING CURRENTS
Ground Current in Regulation
IGND
IL = 300 mA, TA = –40
°C to +100°C
3.0
8.5
mA
IL = 300 mA, TA = 0
°C to 100°C
3.0
6.0
mA
IL = 300 mA, TA = 25
°C
3.0
4.0
mA
IL = 200 mA
2.0
mA
IL = 0.1 mA
100
175
µA
VCC Current in Regulation
IVCC
IL = 300 mA
100
170
µA
Ground Current in Shutdown
IGNDSD
SD = 0 V, VCC = 6 V, VIN = 1.8 V
0.01
2
µA
SHUTDOWN
Threshold Voltage
VTHSD
ON
VCC – 0.9
V
OFF
0.6
V
SD Input Current
ISD
0
≤ SD ≤ 6 V
1.4
7
µA
Output Current In Shutdown
IOSD
TA = 25
°C VCC = 6 V, VIN = 6 V
0.01
1
µA
TA = 100
°C VCC = 6 V, VIN = 6 V
0.01
2
µA
PWRGD
Power Good Output Voltage
IPWRGDL
VPWRGD = 1.2 V, VCC = 3.0 V
0.85
1.5
mA
VPWRGDL
2
IPWRGD = 300
µA
0.4
V
VPWRGDH
2
IPWRGD = 300
µA
VCC – 0.4
V
Power Good On Time Delay
TD1
3
IL = 3 mA to 300 mA,
5
300
µs
COUT = 1
µF to 10 µF
TD2
4
IL = 3 mA to 300 mA,
50
300
µs
COUT = 1
µF to 10 µF
Power Good Off Time Delay
TD35
IL = 3 mA to 300 mA,
0.05
1
µs
COUT = 1
µF to 10 µF
THERMAL PROTECTION
Shutdown Temperature
THPROT
IL = 100 mA
165
°C
NOTES
1Ambient temperature of 100
°C corresponds to a junction temperature of 125°C under typical full load test conditions.
2V
PWRGDL, VPWRGDH,: Powergood output voltages. Guaranteed by design and characterization.
3TD1: Delay time from V
OUT crossing 1 V to PWRGD high. Guaranteed by design.
4TD2: Delay time from
SD high to PWRGD high. Guaranteed by design.
5TD3: Delay time between
SD low to PWRGD low. Guaranteed by design.
Specifications subject to change without notice.



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