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ADSP2181 数据表(PDF) 21 Page - Analog Devices |
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ADSP2181 数据表(HTML) 21 Page - Analog Devices |
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21 / 32 page ![]() ADSP-2181 –21– REV. D Parameter Min Max Unit IDMA Write, Short Write Cycle Timing Requirements: tIKW IACK Low before Start of Write1 0ns tIWP Duration of Write 1, 2 15 ns tIDSU IAD15–0 Data Setup before End of Write 2, 3, 4 5ns tIDH IAD15–0 Data Hold after End of Write 2, 3, 4 2ns Switching Characteristic: tIKHW Start of Write to IACK High 15 ns NOTES 1Start of Write = IS Low and IWR Low. 2End of Write = IS High or IWR High. 3If Write Pulse ends before IACK Low, use specifications t IDSU, tIDH. 4If Write Pulse ends after IACK Low, use specifications t IKSU, tIKH . IAD15–0 DATA tIKHW tIKW tIDSU IACK tIWP tIDH IS IWR Figure 15. IDMA Write, Short Write Cycle |
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