RT8024 datasheet(10/13 Pages) RICHTEK

10 / 13 page

RT8024

DS8024-02 March 2011

www.richtek.com

curves. Thus, to obtain I2R losses, simply add RSW to RL

and multiply the result by the square of the average output

current.

Other losses including CIN and COUT ESR dissipative

losses and inductor core losses generally account for less

than 2% of the total loss.

Thermal Considerations

The maximum power dissipation depends on the thermal

resistance of IC package, PCB layout, the rate of

surroundings airflow and temperature difference between

junction to ambient. The maximum power dissipation can

be calculated by following formula :

PD(MAX) = ( TJ(MAX) - TA ) /

θJA

Where TJ(MAX) is the maximum operation junction

temperature 125

°C, TAis the ambient temperature and the

θJA is the junction to ambient thermal resistance.

For recommended operating conditions specification of

RT8024 DC/DC converter, where TJ (MAX) is the maximum

junction temperature of the die (125

°C) and TA is the

maximum ambient temperature. The junction to ambient

thermal resistance

θJA is layout dependent. For

SOT-23-5/TSOT-23-5 packages, the thermal resistance

θJA

is 250

°C/W on the standard JEDEC 51-3 single-layer

thermal test board. The maximum power dissipation at

TA = 25

°C can be calculated by following formula :

PD(MAX) = ( 125

°C - 25°C ) / 250 = 0.4 W for SOT-23-5/

TSOT-23-5 packages

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance

θJA. For RT8024 packages, the Figure 5 of

derating curves allows the designer to see the effect of

rising ambient temperature on the maximum power

allowed.

The value of junction to case thermal resistance

θJC is

popular for users. This thermal parameter is convenient

for users to estimate the internal junction operated

temperature of packages while IC operating. It's

independent of PCB layout, the surroundings airflow effects

and temperature difference between junction to ambient.

The operated junction temperature can be calculated by

following formula :

TJ = TC + PD x

θJC

Where TC is the package case (Pin 2 of package leads)

temperature measured by thermal sensor, PDis the power

dissipation defined by user's function and the

θJC is the

junction to case thermal resistance provided by IC

manufacturer. Therefore it's easy to estimate the junction

temperature by any condition.

Checking Transient Response

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, VOUT immediately shifts by an amount

equal to

ΔILOAD (ESR), where ESR is the effective series

resistance of COUT.

ΔILOAD also begins to charge or

discharge COUT generating a feedback error signal used

by the regulator to return VOUT to its steady-state value.

During this recovery time, VOUT can be monitored for

overshoot or ringing that would indicate a stability problem.

Layout Considerations

Follow the PCB layout guidelines for optimal performance

of RT8024.

For the main current paths as indicated in bold lines in

Figure 6, keep their traces short and wide.

Put the input capacitor as close as possible to the device

pins (VIN and GND).

LX node is with high frequency voltage swing and should

be kept small area. Keep analog components away from

LX node to prevent stray capacitive noise pick-up.

Figure 5. Derating Curves for RT8024 Package

100

150

200

250

300

350

400

450

100

120

140

Ambient Temperature (°C)

Single Layer PCB

SOT-23-5, TSOT-23-5 Packages

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