OP249

–12–

REV. C

SETTLING TIME

Settling time is the time between when the input signal begins

to change and when the output permanently enters a prescribed

error band. The error bands on the output are 5 mV and 0.5 mV,

respectively, for 0.1% and 0.01% accuracy.

Figure 46 illustrates the OP249’s typical settling time of 870 ns.

Moreover, problems in settling response, such as thermal tails

and long-term ringing are nonexistent.

10

0%

100

90

500ns

10mV

870ns

Figure 46. Settling Characteristics of the OP249 to 0.01%

REFERENCE

1/2

OP249

+15V

–15V

PM7545

12

DATA INPUT

500

C

33pF

75

0.1 F

0.1 F

AGND

REFERENCE

1/2

OP249

+15V

PM7545

12

DATA INPUT

500

C

33pF

75

0.1 F

AGND

1/2

OP249

–15V

0.1 F

R4

20k

1%

R5

10k

1%

R3

10k

1%

0.1 F

DGND

a. Unipolar Operation

b. Bipolar Operation

Figure 47. Fast Settling and Low Offset Error of the OP249 Enhances CMOS DAC Performance

DAC OUTPUT AMPLIFIER

Unity-gain stability, a low offset voltage of 300

µV typical, and a

fast settling time of 870 ns to 0.01%, makes the OP249 an ideal

amplifier for fast digital-to-analog converters.

For CMOS DAC applications, the low offset voltage of the

OP249 results in excellent linearity performance. CMOS DACs,

such as the PM-7545, will typically have a code-dependent

output resistance variation between 11 k

Ω and 33 kΩ. The

change in output resistance, in conjunction with the 11 k

Ω

feedback resistor, will result in a noise gain change. This causes

variations in the offset error, increasing linearity errors. The

OP249 features low offset voltage error, minimizing this effect

and maintaining 12-bit linearity performance over the full-scale

range of the converter.

Since the DAC’s output capacitance appears at the operational

amplifiers inputs, it is essential that the amplifier is adequately

compensated. Compensation will increase the phase margin,

and ensure an optimal overall settling response. The required

lead compensation is achieved with Capacitor C in Figure 47.