SMP04ES datasheet(2/15 Pages) AD

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SMP04–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

Parameter

Symbol

Conditions

Min

Typ

Max

Units

Linearity Error

0.01

Buffer Offset Voltage

VOS

VIN = 6 V

–10

±2.5

+10

Hold Step

VHS

VIN = 6 V, TA = +25°C to +85°C2.5

VIN = 6 V, TA = –40°C5

Droop Rate

∆V/∆tV

IN = 6 V, TA = +25°C

mV/s

Output Source Current

ISOURCE

VIN = 6 V

1.2

Output Sink Current

ISINK

VIN = 6 V

0.5

Output Voltage Range

OVR

RL = 20 kΩ

0.06

10.0

RL = 10 kΩ

0.06

9.5

LOGIC CHARACTERISTICS

Logic Input High Voltage

VINH

2.4

Logic Input Low Voltage

VINL

0.8

Logic Input Current

IIN

0.5

µA

DYNAMIC PERFORMANCE

Acquisition Time

tAQ

TA = +25°C, 0 V to 10 V Step to 0.1%

3.5

4.25

µs

–40

°C ≤ T

A ≤ +85°C

3.75

5.25

µs

Acquisition Time

tAQ

TA = +25°C, 0 V to 10 V Step to 0.01%

µs

Hold Mode Settling Time

To 1 mV

µs

Slew Rate

RL = 20 kΩ

µs

Capacitive Load Stability

<30% Overshoot

500

Analog Crosstalk

0 V to 10 V Step

–80

SUPPLY CHARACTERISTICS

Power Supply Rejection Ratio

PSRR

10.8 V

≤ V

DD ≤ 13.2 V

Supply Current

IDD

Power Dissipation

PDIS

ELECTRICAL CHARACTERISTICS

Parameter

Symbol

Conditions

Min

Typ

Max

Units

Linearity Error

0.01

Buffer Offset Voltage

VOS

VIN = 0 V

–10

±2.5

+10

Hold Step

VHS

VIN = 0 V, TA = +25°C to +85°C2.5

VIN = 0 V, TA = –40°C5

Droop Rate

∆V/∆tV

IN = 0 V, TA = +25

°C

mV/s

Output Resistance

ROUT

Ω

Output Source Current

ISOURCE

VIN = 0 V

1.2

Output Sink Current

ISINK

VIN = 0 V

0.5

Output Voltage Range

OVR

RL = 20 kΩ

–3.0

+3.0

LOGIC CHARACTERISTICS

Logic Input High Voltage

VINH

2.4

Logic Input Low Voltage

VINL

0.8

Logic Input Current

IIN

0.5

µA

DYNAMIC PERFORMANCE

Acquisition Time

tAQ

–3 V to +3 V Step to 0.1%

3.6

µs

Acquisition Time

tAQ

–3 V to +3 V Step to 0.01%

µs

Hold Mode Settling Time

To 1 mV

µs

Slew Rate

RL = 20 kΩ

3V/

µs

Capacitive Load Stability

<30% Overshoot

500

SUPPLY CHARACTERISTICS

Power Supply Rejection Ratio

PSRR

±5 V ≤ V

DD ≤ ± 6 V

Supply Current

IDD

3.5

5.5

Power Dissipation

PDIS

NOTES

1Outputs are capable of sinking and sourcing over 20 mA, but linearity and offset are guaranteed at specified load levels.

2All input control signals are specified with t

R = tF = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.

3This parameter is guaranteed without test.

4Slew rate is measured in the sample mode with a 0 V to 10 V step from 20% to 80%.

5Slew rate is measured in the sample mode with a –3 V to +3 V step from 20% to 80%.

Specifications are subject to change without notice.

REV. D

–2–

(@ VDD = +12.0 V, VSS = DGND = 0 V, RL = No Load, TA = Operating Temperature Range

specified in Absolute Maximum Ratings, unless otherwise noted.)

(@ VDD = +5.0 V, VSS = –5.0 V, DGND = 0.0 V, RL = No Load, TA = Operating Temperature

Range specified in Absolute Maximum Ratings, unless otherwise noted.)

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