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ACT3492 数据表(PDF) 8 Page - Aeroflex Circuit Technology

部件名 ACT3492
功能描述  MIL-STD-1553B Remote Terminal, BUS Controller, or Passive Monitor Hybrid with Status Word Control Dual Low Power Monolithic BUS Tranceivers
PDF  49 Pages
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制造商  AEROFLEX [Aeroflex Circuit Technology]
网页  http://www.aeroflex.com
标志 AEROFLEX - Aeroflex Circuit Technology

ACT3492 数据表(HTML) 8 Page - Aeroflex Circuit Technology

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SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
8
subaddress is busy but others are ready. This option will prove useful when an RT is interfacing with multiple
subsystems.
Use of the Service Request Status Bit
The Service Request bit is used by the subsystem to indicate to the Bus Controller that an asynchronous
service is requested.
The timing of the setting of this bit is the same as the Busy bit and is shown in Figures 14 and 20. Use of
SERVREQ has no effect on the RT apart from setting the Service Request bit.
It should be noted that certain mode commands require that the last status word be transmitted by the RT
instead of the current one, and therefore a currently set status bit will not be seen by the Bus Controller.
Therefore the user is advised to hold SERVREQ low until the requested service takes place.
Use of the Subsystem Status Bit
This status bit is used by the RT to indicate a subsystem fault condition. If the subsystem sets SSERR low
at any time, the subsystem fault condition in the RT will be set, and the Subsystem Flag status bit will
subsequently be set. The fault condition will also be set if a handshaking failure takes place during a data
transfer to or from the subsystem. The fault condition is cleared on power-up or by a Reset mode command.
Dynamic Bus Control Acceptance Status Bit
DBCACC, when set true, enables an RT to configure itself into a Bus Controller, if the subsystem has the
capability, by allowing DBCREQ to pulse true and BIT TIME 18 to be set in the status response. If Dynamic
Bus Control is not required then DBCACC must be tied high. DBCACC tied high inhibits DBCREQ and
clears BIT TIME 18 in the status response.
OPTIONAL STATUS WORD CONTROL
Message Error Bit
The ACT3492 monitors all receptions for errors and sets the Message Error Bit as prescribed in
MIL-STD-1553B. The subsystem designer may, however, exercise the option of monitoring for illegal
commands and forcing the Message Error Bit to be set.
The word count and subaddress lines for the current command are valid when INCMD goes low. The
subsystem must then determine whether or not the word count or subaddress is to be considered illegal by
the RT. If either of them is considered illegal, the subsystem must produce a positive-going pulse called
MEREQ. The positive-going edge of MEREQ must occur within 500 nSec of the falling edge of INCMD .
Subsystem Flag and Terminal Flag Bits
The conditions that cause the Subsystem Flag and Terminal Flag Bits in the Status Word to be reset may be
controlled by the subsystem using the ENABLE, BIT DECODE, NEXT STATUS, and STATUS UPDATE
inputs. If ENABLE is inactive (high), then the Terminal Flag and Subsystem Flag behavior is the same as
described below: (i.e. the other three option lines are disabled).
Subsystem Flag Bit
This bit is reset to logic zero by a power up initialization or the servicing of a legal mode command to
reset the remote terminal (code 01000).
This bit shall be set in the current status register if the subsystem error line, SSERR, from the
subsystem ever goes active low. This bit shall also be set if an RT/subsystem handshaking failure
occurs. This bit, once set, shall be repeatedly set until the detected error condition is known to be no
longer present.



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