ADL5303

Data Sheet

Rev. 0 | Page 20 of 24

Figure 32. Component Side Layout

Figure 33. Component Side Silkscreen

Table 7. Evaluation Board Configuration Options

Component

Function

Default Condition

VPOS, AGND

Positive supply and ground pins.

S1

Device enable. When S1 is in the 0 position, the PWDN pin is connected to

ground and the ADL5303 is in its normal operating mode.

S1 = installed

S2

Guard/shield options. The shells of the SMA connectors used for the input and

the photodiode bias can be set to the voltage on the VSUM pin or connected

to ground. When S2 is in the 0 position, the SMA shell is connected to VSUM.

S2 = installed

Intercept adjustment. A dc offset can be applied to the input terminals of the

buffer amplifier to adjust the effective logarithmic intercept.

R13 = open (Size 0603)

R14 = open (Size 0603)

R5, R6, R7, R8, R9

Bias adjustment. The voltage on the VSUM and INPT pins can be altered using

appropriate resistor values.

R5, R6, R7 = open (Size 0603)

R8, R9 = open (Size 0603)

Slope adjustment.

R15 = 15 kΩ (Size 0603)

R18 = 10 kΩ (Size 0603)

C3

VSUM decoupling capacitor.

C3 = 0.1 μF (Size 0603)

C6

Supply decoupling capacitor.

C6 = 0.1 μF (Size 0603)

R25 (CPB )

Photodiode biaser decoupling. Provides high frequency decoupling.

R25 = open (Size 0603)

R11, R16, R17, R19,

R20

Output filtering. Allows implementation of a variety of filter configurations,

from simple RC low-pass filters to three-pole Sallen and Key filters.

R11, R19, C5 = Open (Size 0603)

R16, R17, R20 = 0 Ω (Size 0603)

C7, C8 = 0.1 μF (Size 0603)

R1, C1

Input filtering. Provides essential HF compensation at the input pin, INPT.

R1 = 750 Ω (Size 0402)

C1 = 1 nF (Size 0603)

R2, R3, R4, R23, R24,

R21, R22, R12, R26

Isolation jumpers.

All = 0 Ω (Size 0603)