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ADL5303ACPZ-R7 数据表(PDF) 16 Page - Analog Devices |
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ADL5303ACPZ-R7 数据表(HTML) 16 Page - Analog Devices |
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16 / 24 page ![]() ADL5303 Data Sheet Rev. 0 | Page 16 of 24 USING THE ADAPTIVE BIAS For most photodiode applications, the placement of the anode somewhat above ground is acceptable, as long as the positive bias on the cathode is adequate to support the peak current for a particular diode, limited mainly by its series resistance. To address this matter, the ADL5303 provides for a diode bias that increases linearly with the current. This bias voltage appears at the VPDB pin, and varies from 0.6 V (reverse-biasing the diode by 0.1 V) for IPD = 100 pA and rises to 2.6 V (for a diode bias of 2 V) at IPD = 10 mA. This results in a constant internal junction bias of 0.1 V when the series resistance of the photodiode is 200 Ω. For optical power measurements over a wide dynamic range, the adaptive biasing function is valuable in minimizing dark current while preventing the loss of photodiode bias at high currents. Use of the adaptive bias feature is shown in Figure 29. Capacitor CPB, between the photodiode cathode at the VPDB pin and ground, is included to lower the impedance at this node and thereby improve the high frequency accuracy at current levels where the ADL5303 bandwidth is high. CPB also ensures a high frequency path for any high frequency modulation on the optical signal, which might not otherwise be accurately averaged. CPB is not necessary in all cases, and experimentation may be required to find an optimum value. NC VOUT 500mV/DEC R18 (RB) C7 (CFILT) R15 (RA) 15k Ω 10k Ω NC = NO CONNECT VP 100nF R1 750 C1 1nF CPB R25 IPD C3 PDB BIAS VREF VPDB LOCATION VSUM INPT VSUM ACOM VPS2 PWDN VPS1 VREF VLOG BFIN BFNG VOUT 0.5V ADL5303 ~10k Ω 5k Ω 5 2 3 4 15 14 GND GND 7 11 10 16 12 6 8 9 13 TEMPERATURE COMPENSATION Figure 29. Using the Adaptive Biasing |
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