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AD5263BRUZ200-R7 数据表(PDF) 13 Page - Analog Devices |
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AD5263BRUZ200-R7 数据表(HTML) 13 Page - Analog Devices |
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13 / 28 page ![]() Data Sheet AD5263 Rev. F | Page 13 of 28 TEST CIRCUITS Figure 29 to Figure 39 define the test conditions used in the Electrical Characteristics—20 KΩ, 50 KΩ, 200 KΩ Versions section and the Timing Characteristics—20 KΩ, 50 KΩ, 200 KΩ Versions. VMS A W B DUT V+ V+ = VDD 1LSB = V+/2N Figure 29. Test Circuit for Potentiometer Divider Nonlinearity Error (INL, DNL) NO CONNECT IW VMS A W B DUT Figure 30. Test Circuit for Resistor Position Nonlinearity Error (Rheostat Operation; R-INL, R-DNL) VMS1 VMS2 VW A W B DUT RW = [VMS1 – VMS2]/IW IW = VDD/RNOMINAL Figure 31. Test Circuit for Wiper Resistance ΔV MS% DD% PSS (%/%) = V+ = VDD 10% PSRR (dB) = 20 log MS DD VDD VA VMS A W B V+ ΔV ΔV ΔV Figure 32. Test Circuit for Power Supply Sensitivity (PSS, PSRR) OP279 W 5V B VOUT OFFSET GND OFFSET BIAS DUT VIN A Figure 33. Test Circuit for Inverting Gain B A VIN OP279 W 5V VOUT OFFSET GND OFFSET BIAS DUT Figure 34. Test Circuit for Noninverting Gain +15V –15V W A 2.5V B VOUT OFFSET GND DUT AD8610 VIN Figure 35. Test Circuit for Gain vs. Frequency W B VSS TO VDD DUT ISW CODE = 0x00 RSW = 0.1V ISW 0.1V Figure 36. Test Circuit for Incremental On Resistance |
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