X02_05 datasheet(4/11 Pages) STMICROELECTRONICS

4 / 11 page

Characteristics

X02

4/11

Doc ID 7480 Rev 4

Figure 5.

Relative variation of triggering,

holding and latching current versus

junction temperature

Figure 6.

Relative variation of holding

current versus gate-cathode

resistance (typical values)

I,I ,I [T ] /

GT H L

,I ,I [T =25°C]

GT H L

0.00

0.25

0.50

0.75

1.00

1.25

1.50

-40

-20

100

120

140

IGT

T (°C)

IH & I

= 1k

Typical values

I [R

] / I [

=1k ]

HGK

RGK

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

1.E-02

1.E-01

1.E+00

1.E+01

Tj=25

R(k )

Figure 7.

Relative variation of dV/dt immunity

versus gate-cathode resistance

(typical values)

Figure 8.

Relative variation of dV/dt immunity

versus gate-cathode capacitance

(typical values)

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

0.1

1.0

10.0

dV/dt[R

] / dV/dt[

=1k ]

RGK

Tj = 125°C

V = 0.67 x V

DRM

R(k )

(nF)

dV/dt[C

] / dV/dt[

=1k ]

RGK

V = 0.67 x V

= 125°C

= 1k

DRM

Figure 9.

Surge peak on-state current

versus number of cycles

Figure 10.

Non repetitive surge peak on state

current for a sinusoidal pulse and

corresponding value of I2T

100

1000

(A)

TSM

Number of cycles

Non repetitive

T initial=25°C

Repetitive

=25°C

amb

t =10ms

One cycle

1.00

10.00

0.10

0.01

300

100

(A), I t (A s)

TSM

T initial = 25°C

I t

ITSM

t (ms)

dI/dt limitation

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