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AD8338ACPZ-R7 数据表(PDF) 13 Page - Analog Devices

部件名 AD8338ACPZ-R7
功能描述  Low Power, 18 MHz Variable Gain Amplifier
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD8338ACPZ-R7 数据表(HTML) 13 Page - Analog Devices

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Data Sheet
AD8338
Rev. 0 | Page 13 of 16
For example, if the 500 Ω input resistors and 9.5 kΩ feedback
resistors are used and a 1 V p-p signal is applied with VGAIN set
to 0.1 V, the output value is as follows:
IIN = 1/(500 + 500) = 1 mA
(5a)
IOUT_VGA = 1 mA × 10−26/20 = 50 µA
(5b)
VOUT = 2 × 50 µA × 9.5 kΩ = 0.95 V p-p
(5c)
The calculation in Equation 5 results in a total gain of approx-
imately −0.4 dB under the specified conditions. Compressing
Equation 2 through Equation 4 produces the following simplified
gain equation:
Gain (dB) = (VGAIN − 0.1) × 80 + 20log(RFEEDBACK/RIN) − 26
(6)
where RFEEDBACK and RIN are the resistor values from a single
input to a single output.
INPR
INPD
INMD
INMR
MODE
COMM
GAIN
DETO
VAGC
VGA CORE
–26dB TO +54dB
OFFSET NULL
OFSN
VREF
VBAT
AUTOMATIC
GAIN
CONTROL
GAIN INTERFACE
AD8338
9.5kΩ
9.5kΩ
VREF
FBKP
OUTP
OUTM
FBKM
IOUT
IIN
500Ω
500Ω
Figure 40. Functional Block Diagram
For example, if a design requires a minimum gain of 20 dB using
a few additional components, Equation 6 shows that applying a
47 Ω resistor to both the INPD and INMD pins (overriding the
value of RIN) sets a gain range of 20 dB to 100 dB (see Figure 41).
INPR
INPD
INMD
INMR
500Ω
500Ω
47Ω
47Ω
IIN
VIN
20dB TO 100dB
OUTP
OUTM
+VOUT/2 + VREF
–VOUT/2 + VREF
Figure 41. Using External Resistors at the INPD and INMD Pins
Similarly, if the user requires a minimum gain of −10 dB,
applying a 1.5 kΩ resistor to both the INPD and INMD pins
sets a gain range of −10 dB to +70 dB.
Effects of Using External Resistors
When the gain is modified through the use of external resistors,
several trade-offs must be considered. For example, with the appli-
cation of 47 Ω resistors at the inputs, the input noise decreases
to approximately 1.5 nV/√Hz, less than the 4.5 nV/√Hz obtained
when using the internal 500 Ω resistors. However, the −3 dB
bandwidth is reduced from 18 MHz to approximately 3 MHz.
AGC CIRCUIT
The automatic gain control (AGC) circuit compares the rms
output of the part with the desired rms output at the VAGC pin.
Based on this comparison, the DETO pin either sources or sinks
current. By connecting the DETO and GAIN pins together and
by connecting the MODE pin to ground, the AGC circuit can
be used to keep the output rms voltage constant.
To ensure that the AGC circuit reacts fast enough to adjust the
gain, but slow enough to allow signals through, place a capacitor
from DETO to ground. For example, in an on-off keying (OOK)
application with a carrier frequency of 6.795 MHz and a bit rate
of 10 kb/sec, a capacitor value of 0.01 µF is recommended. This
value ensures that the gain reacts to the bit energy but does not
react to the carrier signal.
To set the target rms output voltage, apply a voltage to VAGC.
The target output voltage is lowest when VAGC is set to 1.5 V
and increases when the applied voltage diverges from the 1.5 V
reference voltage. To enable an increasing voltage at the VAGC
pin to increase the rms output voltage, use Equation 7.
VORMS = 1.7 × VAGC − 2.264
(7)
To enable a decreasing voltage at the VAGC pin to increase
the rms output voltage, use Equation 8.
VORMS = −1.7 × VAGC + 2.864
(8)
If the AGC feature is not used, tie the DETO pin to COMM.



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