数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD9268 数据表(PDF) 39 Page - Analog Devices

部件名 AD9268
功能描述  16-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9268 数据表(HTML) 39 Page - Analog Devices

Back Button AD9268 Datasheet HTML 35Page - Analog Devices AD9268 Datasheet HTML 36Page - Analog Devices AD9268 Datasheet HTML 37Page - Analog Devices AD9268 Datasheet HTML 38Page - Analog Devices AD9268 Datasheet HTML 39Page - Analog Devices AD9268 Datasheet HTML 40Page - Analog Devices AD9268 Datasheet HTML 41Page - Analog Devices AD9268 Datasheet HTML 42Page - Analog Devices AD9268 Datasheet HTML 43Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 44 page
background image
AD9268
Rev. A | Page 39 of 44
Address
(Hex)
Register
Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
(Hex)
Default
Notes/
Comments
0x0E
BIST enable
(global)
Open
Open
Open
Open
Open
Reset BIST
sequence
Open
BIST
enable
0x04
0x0F
ADC input
(global)
Open
Open
Open
Open
Open
Open
Open
Common-
mode
servo
enable
0x00
0x10
Offset adjust
(local)
Offset adjust in LSBs from +127 to −128
(twos complement format)
0x00
0x14
Output mode
Drive
strength
0 = ANSI
LVDS;
1 =
reduced
swing
LVDS
(global)
Output
type
0 = CMOS
1 = LVDS
(global)
CMOS
output
interleave
enable
(global)
Output
enable
bar
(local)
Open
(must be
written
low)
Output
invert
(local)
Output format
00 = offset binary
01 = twos
complement
01 = gray code
11 = offset binary
(local)
0x00
Configures the
outputs and
the format of
the data
0x16
Clock phase
control
(global)
Invert
DCO clock
Open
Open
Open
Open
Input clock divider phase adjust
000 = no delay
001 = 1 input clock cycle
010 = 2 input clock cycles
011 = 3 input clock cycles
100 = 4 input clock cycles
101 = 5 input clock cycles
110 = 6 input clock cycles
111 = 7 input clock cycles
0x00
Allows
selection of
clock delays
into the input
clock divider
0x17
DCO output
delay (global)
Open
Open
Open
DCO clock delay
(delay = 2500 ps × register value/31)
00000 = 0 ps
00001 = 81 ps
00010 = 161 ps
11110 = 2419 ps
11111 = 2500 ps
0x00
0x18
VREF select
(global)
Reference voltage
selection
00 = 1.25 V p-p
01 = 1.5 V p-p
10 = 1.75 V p-p
11 = 2.0 V p-p
(default)
Open
Open
Open
Open
Open
Open
0xC0
0x24
BIST signature
LSB (local)
BIST signature[7:0]
0x00
Read only
0x25
BIST signature
MSB (local)
BIST signature[15:8]
0x00
Read only
0x30
Dither enable
(local)
Open
Open
Open
Dither
enable
Open
Open
Open
Open
0x00
Digital Feature Control
0x100
Sync control
(global)
Open
Open
Open
Open
Open
Clock
divider
next sync
only
Clock
divider
sync
enable
Master
sync
enable
0x00



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com