ADP2302/ADP2303

Data Sheet

Rev. A | Page 22 of 28

CIRCUIT BOARD LAYOUT RECOMMENDATIONS

Good circuit board layout is essential to obtaining the best

performance for ADP2302/ADP2303. Poor layout can affect the

regulation and stability, as well as the electromagnetic interface

(EMI) and electromagnetic compatibility (EMC) performance.

A PCB layout example is shown in Figure 53. Refer to the

following guidelines for a good PCB layout:



Place the input capacitor, the inductor, catch diode, output

capacitor, and bootstrap capacitor close to the IC using

short traces.



Ensure that the high current loop traces are as short and

wide as possible. The high current path is shown Figure 52.



Maximize the size of ground metal on the component side

to improve thermal dissipation.



Use a ground plane with several vias connecting to the

component side ground to further reduce noise on

sensitive circuit nodes.



Minimize the length of the FB trace connecting the top of

the feedback resistive voltage divider to the output. In

addition, keep these traces away from the high current

traces and the switch node to avoid noise pickup.

VIN

ADP2302/

ADP2303

EN

GND

BST

SW

PGOOD

FB

Figure 52. Typical Application Circuit with High Current Lines Shown in Blue

BST 1

2

3

4

8

7

6

5

EXPOSED

PAD

VIN

EN

PGOOD

SW

GND

NC

FB

BST CAP

DIODE

INDUCTOR

INPUT

CAPACITOR

OUTPUT

CAPACITORS

GND

Figure 53. Recommended Layout for ADP2302/ADP2303