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LAN8720AI 数据表(PDF) 32 Page - SMSC Corporation |
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LAN8720AI 数据表(HTML) 32 Page - SMSC Corporation |
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32 / 79 page ![]() Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support Datasheet Revision 1.4 (08-23-12) 32 SMSC LAN8720A/LAN8720Ai DATASHEET The MODE[2:0] hardware configuration pins are multiplexed with other signals as shown in Table 3.5. 3.7.3 REGOFF: Internal +1.2V Regulator Configuration The incorporation of flexPWR technology provides the ability to disable the internal +1.2V regulator. When the regulator is disabled, an external +1.2V must be supplied to the VDDCR pin. Disabling the internal +1.2V regulator makes it possible to reduce total system power, since an external switching regulator with greater efficiency (versus the internal linear regulator) can be used to provide +1.2V to the transceiver circuitry. Note: Because the REGOFF configuration strap shares functionality with the LED1 pin, proper consideration must also be given to the LED polarity. Refer to Section 3.8.1.1, "REGOFF and LED1 Polarity Selection," on page 37 for additional information on the relation between REGOFF and the LED1 polarity. Table 3.4 MODE[2:0] Bus MODE[2:0] MODE DEFINITIONS DEFAULT REGISTER BIT VALUES REGISTER 0 REGISTER 4 [13,12,10,8] [8,7,6,5] 000 10Base-T Half Duplex. Auto-negotiation disabled. 0000 N/A 001 10Base-T Full Duplex. Auto-negotiation disabled. 0001 N/A 010 100Base-TX Half Duplex. Auto-negotiation disabled. CRS is active during Transmit & Receive. 1000 N/A 011 100Base-TX Full Duplex. Auto-negotiation disabled. CRS is active during Receive. 1001 N/A 100 100Base-TX Half Duplex is advertised. Auto- negotiation enabled. CRS is active during Transmit & Receive. 1100 0100 101 Repeater mode. Auto-negotiation enabled. 100Base-TX Half Duplex is advertised. CRS is active during Receive. 1100 0100 110 Power Down mode. In this mode the transceiver will wake-up in Power-Down mode. The transceiver cannot be used when the MODE[2:0] bits are set to this mode. To exit this mode, the MODE bits in Register 18.7:5(see Section 4.2.9, "Special Modes Register," on page 57) must be configured to some other value and a soft reset must be issued. N/A N/A 111 All capable. Auto-negotiation enabled. X10X 1111 Table 3.5 Pin Names for Mode Bits MODE BIT PIN NAME MODE[0] RXD0/MODE0 MODE[1] RXD1/MODE1 MODE[2] CRS_DV/MODE2 |
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