HT56RB27 datasheet(81/153 Pages) HOLTEK

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Interrupt Operation

A Timer/Event Counter overflow, Time Base, RTC overflow, SPI/I2C data transfer complete, an end

of A/D conversion, USB event, Smart Card event, Smart Card insertion/removal or the external

interrupt line being triggered will all generate an interrupt request by setting their corresponding

request flag. When this happens and if their appropriate interrupt enable bit is set, the Program

Counter, which stores the address of the next instruction to be executed, will be transferred onto the

stack. The Program Counter will then be loaded with a new address which will be the value of the

corresponding interrupt vector. The microcontroller will then fetch its next instruction from this

interrupt vector. The instruction at this vector will usually be a JMP statement which will jump to

another section of program which is known as the interrupt service routine. Here is located the code to

control the appropriate interrupt. The interrupt service routine must be terminated with a RETI

statement, which retrieves the original Program Counter address from the stack and allows the

microcontroller to continue with normal execution at the point where the interrupt occurred.

The various interrupt enable bits, together with their associated request flags, are shown in the

accompanying diagram with their order of priority.

Once an interrupt subroutine is serviced, all the other interrupts will be blocked, as the EMI bit will be

cleared automatically. This will prevent any further interrupt nesting from occurring. However, if other

interrupt requests occur during this interval, although the interrupt will not be immediately serviced,

the request flag will still be recorded. If an interrupt requires immediate servicing while the program is

already in another interrupt service routine, the EMI bit should be set after entering the routine, to

allow interrupt nesting. If the stack is full, the interrupt request will not be acknowledged, even if the

related interrupt is enabled, until the Stack Pointer is decremented. If immediate service is desired, the

stack must be prevented from becoming full.

Interrupt Priority

Interrupts, occurring in the interval between the rising edges of two consecutive T2 pulses, will be

serviced on the latter of the two T2 pulses, if the corresponding interrupts are enabled. In case of

simultaneous requests, the following table shows the priority that is applied.

Interrupt Source

Priority

Vector

Smart Card Interrupt

04H

USB Interrupt

08H

External Interrupt 0

0CH

External Interrupt 1

10H

Timer/Event Counter 0 Overflow

14H

Timer/Event Counter 1 Overflow

18H

Smart Card Insertion/Removal Interrupt

1CH

A/D Converter Interrupt

20H

Multi-function 0 Interrupt

24H

Multi-function 1 Interrupt

28H

The SIM0 interrupt, Real Time clock interrupt, Time Base interrupt and External Peripheral inter-

rupt share the same interrupt vector which is 24H while the SIM1 interrupt, Timer/Event Counter 2

overflow and Timer/Event Counter 3 overflow interrupt share the same interrupt vector which is

28H. Each of these interrupts has their own individual interrupt flag but also share the same

multi-function interrupt flag named MF0F or MF1F respectively. The MF0F or MF1F flag will be

cleared by hardware once the corresponding Multi-function interrupt is serviced. However the indi-

vidual interrupts that have triggered the Multi-function interrupt need to be cleared by the applica-

tion program.

HT56RB27

TinyPowerTM A/D Type Smart Card OTP MCU

with DAC, ISO 7816 and USB Interfaces

Rev. 1.20

April 26, 2013

HT56RB27 数据表(PDF) 81 Page - Holtek Semiconductor Inc

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