DS92001

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SNLS147F – JUNE 2002 – REVISED APRIL 2013

DC Test Circuits

Figure 3. Differential Driver DC Test Circuit

Figure 4. Differential Driver Full Load DC Test Circuit

AC Test Circuits and Timing Diagrams

Figure 5. BLVDS Output Load

Figure 6. Propagation Delay Low-to-High and High-to-Low

Figure 7. BLVDS Output Transition Time

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