12

Analog Input

The differential analog inputs of the ACPL-7970 are im-

plemented with a fully-differential, switched-capacitor

circuit. The ACPL-7970 accepts signal of ±200 mV (full

scale ±320 mV), which is ideal for direct connection to

shunt based current sensing or other low-level signal

sources applications such as motor phase current mea-

surement. An internal voltage reference determines the

full-scale analog input range of the modulator (±320 mV);

an input range of ±200 mV is recommended to achieve

optimal performance. Users are able to use higher input

range, for example ±250 mV, as long as within full-scale

range, for purpose of over-current or overload detection.

Figure 14 shows the simplified equivalent circuit of the

analog input.

In the typical application circuit (Figure 19), the ACPL-7970

is connected in a single-ended input mode. Given the

fully differential input structure, a differential input con-

nection method (balanced input mode as shown in Figure

15) is recommended to achieve better performance. The

input currents created by the switching actions on both of

the pins are balanced on the filter resistors and cancelled

out each other. Any noise induced on one pin will be

coupled to the other pin by the capacitor C and creates

only common mode noise which is rejected by the device.

Typical values for Ra (= Rb) and C are 22

Ω and 10 nF re-

spectively.

Latch-up Consideration

Latch-up risk of CMOS devices needs careful consider-

ation, especially in applications with direct connection to

signal source that is subject to frequent transient noise.

The analog input structure of the ACPL-7970 is designed

to be resilient to transients and surges, which are often

encountered in highly noisy application environments

such as motor drive and other power inverter systems.

Other situations could cause transient voltages to the

inputs include short circuit and overload conditions. The

ACPL-7970 is tested with DC voltage of up to -2 V and

2-second transient voltage of up to -6 V to the analog

inputs with no latch-up or damage to the device.

Modulator Data Output

Input signal information is contained in the modulator

output data stream, represented by the density of ones

and zeros. The density of ones is proportional to the input

signal voltage, as shown in Figure 16. A differential input

signal of 0 V ideally produces a data stream of ones and

zeros in equal densities. A differential input of -200 mV

corresponds to 18.75% density of ones, and a differen-

tial input of +200 mV is represented by 81.25% density of

ones in the data stream. A differential input of +320 mV or

higher results in ideally all ones in the data stream, while

input of -320 mV or lower will result in all zeros ideally.

Table 5 shows this relationship.

Figure 14. Analog input equivalent circuit.

Figure 15. Simplified differential input connection diagram.

200

Ω (TYP)

3 pF (TYP)

3 pF (TYP)

= MCLK

200

Ω (TYP)

1.5 pF

1.5 pF

COMMON MODE

VOLTAGE

= MCLK

ANALOG

GROUND

ACPL-7970

5 V

+Analog Input

–Analog Input

Ra

Rb

C

GND1

–FS (ANALOG INPUT)

+FS (ANALOG INPUT)

0 V (ANALOG INPUT)

TIME

MODULATOR OUTPUT

ANALOG INPUT

Figure 16. Modulator output vs. analog input.