PBV-R005-0.5 datasheet(7/18 Pages) AVAGO

7 / 18 page

Table 7. Electrical Specifications

Unless otherwise noted, TA = -40° C to +105° C, VDD1 = 4.5 V to 5.5 V, VDD2 = 3 V to 5.5 V, VIN+ = -200 mV to +200 mV, and

VIN– = 0 V (single-ended connection); tested with Sinc3 filter, 256 decimation ratio.

Parameter

Symbol

Min.

Typ.[1] Max.

Units

Test Conditions/Notes

Fig.

STATIC CHARACTERISTICS

Resolution

Bits

Decimation filter output set to 16 bits

Integral Nonlinearity

INL

-15

LSB

TA = -40° C to +85° C; see Definitions

section

-25

LSB

TA = 85° C to 105° C

Differential Nonlinearity

DNL

-0.9

0.9

LSB

No missing codes, guaranteed by

design; see Definitions section

Offset Error

VOS

-2

0.4

TA = -40° C to +105° C;

see Definitions section

Offset Drift vs. Temperature

TCVOS

mV/°C

VDD1 = 5 V

Offset Drift vs. VDD1

220

mV/V

Internal Reference Voltage

VREF

320

Reference Voltage Tolerance

-1

TA = 25° C, VIN+ = -320 to +320 mV;

see Definitions section

-2

TA = -40° C to +105° C,

VIN+ = -320 to +320 mV

VREF Drift vs. Temperature

TCGE

ppm/°C

VREF Drift vs. VDD1

-1.3

mV/V

Note 4

ANALOG INPUTS

Full-Scale Differential Voltage

Input Range

FSR

320

VIN = VIN+ – VIN–; Note 2

Average Input Bias Current

IINA

-0.3

VDD1 = 5V, VDD2 = 5V, VIN+ = 0 V;

Note 3

Average Input Resistance

RIN

Across VIN+ or VIN– to GND1; Note 3

Input Capacitance

CINA

Across VIN+ or VIN– to GND1

DYNAMIC CHARACTERISTICS

VIN+ = 400 mVpp, 1 kHz sine wave

Signal-to-Noise Ratio

SNR

TA = -40° C to +105° C;

see Definitions section

Signal-to-(Noise + Distortion)

Ratio

SNDR

TA = -40° C to +105° C;

see Definitions section

Effective Number of Bits

ENOB

Bits

see Definitions section

Isolation Transient Immunity

CMR

kV/

VCM = 1 kV; See Definitions section

Common-Mode Rejection Ratio

CMRR

DIGITAL OUTPUTS

Output High Voltage

VOH

VDD2 –

0.2

VDD2 –

0.1

IOUT = -200 mA

Output Low Voltage

VOL

0.6

IOUT = +1.6 mA

POWER SUPPLY

VDD1 Supply Current

IDD1

VIN+ = –320 mV to +320 mV

VDD2 Supply Current

IDD2

5.2

VDD2 = 5 V supply

4.6

VDD2 = 3.3 V supply

Notes:

1. All Typical values are at TA = 25° C, VDD1 = 5 V, VDD2 = 5 V.

2. Beyond the full-scale input range the data output is either all zeroes or all ones.

3. Because of the switched-capacitor nature of the isolated modulator, time averaged values are shown.

4. VREF Drift vs. VDD1 can be expressed as –0.4%/V with reference to VREF.

PBV-R005-0.5 数据表(PDF) 7 Page - AVAGO TECHNOLOGIES LIMITED

PBV-R005-0.5 数据表(HTML) 7 Page - AVAGO TECHNOLOGIES LIMITED

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

数据表下载

链接网址

PBV-R005-0.5 数据表(PDF) 7 Page - AVAGO TECHNOLOGIES LIMITED

PBV-R005-0.5 数据表(HTML) 7 Page - AVAGO TECHNOLOGIES LIMITED

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

数据表 下载

链接网址

数据表下载