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MC68331TS 数据表(PDF) 76 Page - Freescale Semiconductor, Inc

部件名 MC68331TS
功能描述  32-Bit Modular Microcontroller
PDF  84 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MC68331TS 数据表(HTML) 76 Page - Freescale Semiconductor, Inc

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MC68331TS/D
When GPT pins are used as an 8-bit port, DDRGP determines whether pins are input or output and
PORTGP holds the 8-bit data.
DDRGP[7:0] — Port GP Data Direction Register
0 = Input only
1 = Output
Each bit in DDRGP determines whether the corresponding PORTGP bit is input or output.
All OC outputs can be controlled by the action of OC1. OC1M contains a mask that determines which
pins are affected. OC1D determines what the outputs are.
OC1M[5:1] — OC1 Mask Field
0 = Corresponding output compare pin is not affected by OC1 compare.
1 = Corresponding output compare pin is affected by OC1 compare.
OC1M[5:1] correspond to OC[5:1].
OC1D[5:1] — OC1 Data Field
0 = If OC1 mask bit is set, clear the corresponding output compare pin on OC1 match.
1 = If OC1 mask bit is set, set the corresponding output compare pin on OC1 match.
OC1D[5:1] correspond to OC[5:1].
TCNT — Timer Counter Register
$YFF90A
TCNT is the 16-bit free-running counter associated with the input capture, output compare, and pulse
accumulator functions of the GPT module.
PACTL enables the pulse accumulator and selects either event counting or gated mode. In event count-
ing mode, PACNT is incremented each time an event occurs. In gated mode, it is incremented by an
internal clock.
PAIS — PAI Pin State (Read Only)
PAEN — Pulse Accumulator System Enable
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
DDRGP/PORTGP — Port GP Data Direction Register/Port GP Data Register
$YFF906
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DDGP7
DDGP6 DDGP5 DDGP4 DDGP3 DDGP2 DDGP1 DDGP0
PGP7
PGP6
PGP5
PGP4
PGP3
PGP2
PGP1
PGP0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OC1M/OC1D — OC1 Action Mask Register/OC1 Action Data Register
$YFF908
15
11
10
9
8
7
3
2
1
0
OC1M
0
0
0
OC1D
0
0
0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PACTL/PACNT — Pulse Accumulator Control Register/Counter
$YFF90C
15
14
13
12
11
10
9
8
7
0
PAIS
PAEN
PAMOD
PEDGE PCLKS
I4/O5
PACLK
PACNT
RESET:
U
0
0
0
U
0
0
0
0
0
0
0
0
0
0
0
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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