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ADM1069ACPZ 数据表(PDF) 29 Page - Analog Devices |
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ADM1069ACPZ 数据表(HTML) 29 Page - Analog Devices |
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29 / 32 page ![]() ADM1069 Rev. C | Page 29 of 32 8 Write Byte/Word In a write byte/word operation, the master device sends a command byte and one or two data bytes to the slave device, as follows: 1. The master device asserts a start condition on SDA. 2. The master sends the 7-bit slave address followed by the write bit (low). 3. The addressed slave device asserts an ACK on SDA. 4. The master sends a command code. 5. The slave asserts an ACK on SDA. 6. The master sends a data byte. 7. The slave asserts an ACK on SDA. 8. The master sends a data byte (or asserts a stop condition). 9. The slave asserts an ACK on SDA. 10. The master asserts a stop condition on SDA to end the transaction. In the ADM1069, the write byte/word protocol is used for the following three purposes: • To write a single byte of data to the RAM. In this case, the command byte is RAM Address 0x00 to RAM Address 0xDF, and the only data byte is the actual data, as shown in Figure 41. SLAVE ADDRESS RAM ADDRESS (0x00 TO 0xDF) S W A DATA AP A 24 13 5 7 6 Figure 41. Single Byte Write to the RAM • To set up a 2-byte EEPROM address for a subsequent read, write, block read, block write, or page erasure. In this case, the command byte is the high byte of EEPROM Address 0xF8 to EEPROM Address 0xFB. The only data byte is the low byte of the EEPROM address, as shown in Figure 42. SLAVE ADDRESS EEPROM ADDRESS HIGH BYTE (0xF8 TO 0xFB) SW A EEPROM ADDRESS LOW BYTE (0x00 TO 0xFF) AP A 24 13 5 7 6 8 Figure 42. Setting an EEPROM Address Because a page consists of 32 bytes, only the three MSBs of the address low byte are important for page erasure. The lower five bits of the EEPROM address low byte specify the addresses within a page and are ignored during an erase operation. • To write a single byte of data to the EEPROM. In this case, the command byte is the high byte of EEPROM Address 0xF8 to EEPROM Address 0xFB. The first data byte is the low byte of the EEPROM address, and the second data byte is the actual data, as shown in Figure 43. SLAVE ADDRESS EEPROM ADDRESS HIGH BYTE (0xF8 TO 0xFB) SW A EEPROM ADDRESS LOW BYTE (0x00 TO 0xFF) AP A 24 13 5 7 A 9 DATA 8 6 10 Figure 43. Single Byte Write to the EEPROM Block Write In a block write operation, the master device writes a block of data to a slave device. The start address for a block write must have been set previously. In the ADM1069, a send byte opera- tion sets a RAM address, and a write byte/word operation sets an EEPROM address, as follows: 1. The master device asserts a start condition on SDA. 2. The master sends the 7-bit slave address followed by the write bit (low). 3. The addressed slave device asserts an ACK on SDA. 4. The master sends a command code that tells the slave device to expect a block write. The ADM1069 command code for a block write is 0xFC (1111 1100). 5. The slave asserts an ACK on SDA. 6. The master sends a data byte that tells the slave device how many data bytes are being sent. The SMBus specification allows a maximum of 32 data bytes in a block write. 7. The slave asserts an ACK on SDA. 8. The master sends N data bytes. 9. The slave asserts an ACK on SDA after each data byte. 10. The master asserts a stop condition on SDA to end the transaction. SLAVE ADDRESS SW A 2 COMMAND 0xFC (BLOCK WRITE) 4 13 A 5 BYTE COUNT 6 A 7 A 910 A P A DATA 1 8 DATA N DATA 2 Figure 44. Block Write to the EEPROM or RAM Unlike some EEPROM devices that limit block writes to within a page boundary, there is no limitation on the start address when performing a block write to EEPROM, except when • There are fewer than N locations from the start address to the highest EEPROM address (0xFBFF), which results in writing to invalid addresses. • An address crosses a page boundary. In this case, both pages must be erased before programming. Note that the ADM1069 features a clock extend function for writes to EEPROM. Programming an EEPROM byte takes approximately 250 μs, which limits the SMBus clock for repeated or block write operations. The ADM1069 pulls SCL low and extends the clock pulse when it cannot accept any more data. |
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