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VND830ASP 数据表(PDF) 5 Page - STMicroelectronics |
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VND830ASP 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 17 page ![]() 5/17 VND830ASP TRUTH TABLE (per channel) ELECTRICAL TRANSIENT REQUIREMENTS CONDITIONS INPUT OUTPUT SENSE Normal operation L H L H 0 Nominal Overtemperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 Overvoltage L H L L 0 0 Short circuit to GND L H H L L L 0 (Tj<TTSD) 0 (Tj>TTSD) VSENSEH Short circuit to VCC L H H H 0 < Nominal Negative output voltage clamp LL 0 ISO T/R 7637/1 Test Pulse TEST LEVELS I II III IV Delays and Impedance 1 -25 V -50 V -75 V -100 V 2 ms 10 Ω 2 +25 V +50 V +75 V +100 V 0.2 ms 10 Ω 3a -25 V -50 V -100 V -150 V 0.1 µs 50 Ω 3b +25 V +50 V +75 V +100 V 0.1 µs 50 Ω 4 -4 V -5 V -6 V -7 V 100 ms, 0.01 Ω 5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2 Ω ISO T/R 7637/1 Test Pulse TEST LEVELS RESULTS I II III IV 1 CCC C 2 CCC C 3a CCC C 3b CCC C 4 CCC C 5C E E E CLASS CONTENTS C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. |
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