SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006

TLV2211, TLV2211Y

Advanced LinCMOS RAILTORAIL

MICROPOWER SINGLE OPERATIONAL AMPLIFIERS

27

POST OFFICE BOX 655303

APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim Parts

, the model generation software used

with Microsim PSpice

. The Boyle macromodel (see Note 6) and subcircuit in Figure 54 are generated using

simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):

NOTE 6: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal

of Solid-State Circuits, SC-9, 353 (1974).

OUT

+

−

+

−

+

−

+

−

+

−

+

−

+

−

+

−

+

−

.SUBCKT TLV2211 1 2 3 4 5

C1

11

12

8.86E−12

C2

6

7

50.00E−12

DC

5

53

DX

DE

54

5

DX

DLP

90

91

DX

DLN

92

90

DX

DP

43DX

EGND

99

0

POLY (2) (3,0) (4,0) 0 .5 .5

FB

7

99

POLY (5) VB VC VE VLP

+ VLN 0 4.29E6 −6E6 6E6 6E6 −6E6

GA

6

0

11

12 9.425E−6

GCM

0

6

10

99 1320.2E−12

ISS

3

10

DC 1.250E−6

HLIM

90

0

VLIM 1K

J1

11

2

10 JX

J2

12

1

10 JX

R2

6

9

100.0E3

RD1

60

11

106.1E3

RD2

60

12

106.1E3

R01

8

5

50

R02

7

99

150

RP

3

4

419.2E3

RSS

10

99

160.0E6

VAD

60

4

−.5

VB

9

0

DC 0

VC

3

53

DC .55

VE

54

4

DC .55

VLIM

7

8

DC 0

VLP

91

0

DC 0.1

VLN

0

92

DC 2.6

.MODEL DX D (IS=800.0E−18)

.MODEL JX PJF (IS=500.0E−15 BETA=166E−6

+ VTO=−.004)

.ENDS

VDD +

RP

IN −

2

IN +

1

VDD −

VAD

RD1

11

J1

J2

10

RSS

ISS

3

12

RD2

60

VE

54

DE

DP

VC

DC

4

C1

53

R2

6

9

EGND

VB

FB

C2

GCM

GA

VLIM

8

5

RO1

RO2

HLIM

90

DLP

91

DLN

92

VLN

VLP

99

7

Figure 55. Boyle Macromodel and Subcircuit

PSpice and Parts are trademark of MicroSim Corporation.

Macromodels, simulation models, or other models provided by TI,

directly or indirectly, are not warranted by TI as fully representing all

of the specification and operating characteristics of the

semiconductor product to which the model relates.