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JS28F128P30TF75A 数据表(PDF) 21 Page - Micron Technology |
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JS28F128P30TF75A 数据表(HTML) 21 Page - Micron Technology |
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21 / 90 page  Datasheet Apr 2010 21 Order Number:208033-02 P30-65nm SBC Table 7: Command Bus Cycles Mode Command Bus Cycles First Bus Cycle Second Bus Cycle Oper Addr(1) Data(2) Oper Addr(1) Data(2) Read Read Array 1 Write DnA 0xFF - - - Read Device Identifier ≥ 2 Write DnA 0x90 Read DBA + IA ID Read CFI ≥ 2Write DnA 0x98 Read DBA + CFI-A CFI-D Read Status Register 2 Write DnA 0x70 Read DnA SRD Clear Status Register 1 Write DnA 0x50 - - - Program Word Program 2 Write WA 0x40 Write WA WD Buffered Program(3) > 2 Write WA 0xE8 Write WA N - 1 Buffered Enhanced Factory Program (BEFP)(4) > 2 Write WA 0x80 Write WA 0xD0 Erase Block Erase 2 Write BA 0x20 Write BA 0xD0 Suspend Program/Erase Suspend 1Write DnA 0xB0 - - - Program/Erase Resume 1Write DnA 0xD0 - - - Protection Block Lock 2 Write BA 0x60 Write BA 0x01 Block Unlock 2 Write BA 0x60 Write BA 0xD0 Block Lock-down 2 Write BA 0x60 Write BA 0x2F Program OTP Register 2 Write OTP-RA 0xC0 Write OTP-RA OTP-D Program Lock Register 2 Write LRA 0xC0 Write LRA LRD Configuration Configure Read Configuration Register 2 Write RCD 0x60 Write RCD 0x03 Blank Check Block Blank Check 2 Write BA 0xBC Write BA D0 EFI Extended Function Interface(5) >2 Write WA 0xEB Write WA Sub-Op code Notes: 1. First command cycle address should be the same as the operation’s target address. DBA = Device Base Address. DnA = Address within the device. IA = Identification code address offset. CFI-A = Read CFI address offset. WA = Word address of memory location to be written. BA = Address within the block. OTP-RA = OTP Register address. LRA = Lock Register address. RCD = Read Configuration Register data on A[16:1] for TSOP and BGA package; on A[15:0] for QUAD+ package. 2. ID = Identifier data. CFI-D = CFI data on DQ[15:0]. SRD = Status Register data. WD = Word data. N = Word count of data to be loaded into the write buffer. OTP-D = OTP Register data. LRD = Lock Register data. 3. The second cycle of the Buffered Program Command is the word count of the data to be loaded into the write buffer. This is followed by up to 256 words of data. Then the confirm command (0xD0) is issued, triggering the array programming operation. 4. The confirm command (0xD0) is followed by the buffer data. 5. The second cycle is a Sub-Op-Code, the data written on third cycle is N-1; 1 ≤ N ≤ 256. The subsequent cycles load data words into the program buffer at a specified address until word count is achieved. After the data words are loaded, the final cycle is the confirm cycle 0xD0). |
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