2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit

nanoDAC, SPI Interface in LFCSP and SC70

Data Sheet

AD5601/AD5611/AD5621

Rev. G

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FEATURES

6-lead SC70 and LFCSP packages

Micropower operation: 100 µA maximum at 5 V

Power-down typically to 0.2 µA at 3 V

2.7 V to 5.5 V power supply

Guaranteed monotonic by design

Power-on reset to 0 V with brownout detection

3 power-down functions

Low power serial interface with Schmitt-triggered inputs

On-chip output buffer amplifier, rail-to-rail operation

SYNC interrupt facility

Minimized zero-code error

AD5601 buffered 8-bit DAC

B version: ±0.5 LSB INL

AD5611 buffered 10-bit DAC

B version: ±0.5 LSB INL

A version: ±4 LSB INL

AD5621 buffered 12-bit DAC

B version: ±1 LSB INL

A version: ±6 LSB INL

APPLICATIONS

Voltage level setting

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

Programmable attenuators

GENERAL DESCRIPTION

The AD5601/AD5611/AD5621, members of the nanoDAC®

family, are single, 8-/10-/12-bit, buffered voltage output DACs

that operate from a single 2.7 V to 5.5 V supply, consuming

typically 75 µA at 5 V. The parts come in tiny LFCSP and SC70

packages. Their on-chip precision output amplifier allows rail-

to-rail output swing to be achieved. The AD5601/AD5611/

AD5621 utilize a versatile 3-wire serial interface that operates at

clock rates up to 30 MHz and is compatible with SPI, QSPI™,

MICROWIRE™, and DSP interface standards.

The reference for the AD5601/AD5611/AD5621 is derived

from the power supply inputs and, therefore, gives the widest

dynamic output range. The parts incorporate a power-on reset

circuit, which ensures that the DAC output powers up to 0 V

and remains there until a valid write to the device takes place.

The AD5601/AD5611/AD5621 contain a power-down feature

that reduces current consumption to typically 0.2 µA at 3 V.

FUNCTIONAL BLOCK DIAGRAM

Figure 1.

Table 1. Related Devices

Part Number

Description

AD5641

2.7 V to 5.5 V, <100 µA, 14-bit nanoDAC in

SC70 and LFCSP packages

They also provide software-selectable output loads while in

power-down mode. The parts are put into power-down mode

over the serial interface.

The low power consumption of these parts in normal operation

makes them ideally suited to portable battery-operated equip-

ment. The combination of small package and low power makes

these nanoDAC devices ideal for level-setting requirements,

such as generating bias or control voltages in space-constrained

and power-sensitive applications.

PRODUCT HIGHLIGHTS

1. Available in 6-lead LFCSP and SC70 packages.

2. Low power, single-supply operation. The AD5601/

AD5611/AD5621 operate from a single 2.7 V to 5.5 V

supply with a maximum current consumption of 100 µA,

making them ideal for battery-powered applications.

3. The on-chip output buffer amplifier allows the output of

the DAC to swing rail-to-rail with a typical slew rate of

0.5 V/µs.

4. Reference is derived from the power supply.

5. High speed serial interface with clock speeds up to

30 MHz. Designed for very low power consumption.

The interface powers up only during a write cycle.

6. Power-down capability. When powered down, the DAC

typically consumes 0.2 µA at 3 V. Power-on reset with

brownout detection.

AD5601/AD5611/AD5621

GND

POWER-ON

RESET

DAC

REGISTER

12-/10-/8-BIT

DAC

INPUT

CONTROL

LOGIC

POWER-DOWN

CONTROL LOGIC

OUTPUT

BUFFER

RESISTOR

NETWORK

REF(+)

SCLK SDIN

SYNC