ADAV4622

Rev. B | Page 2 of 28

TABLE OF CONTENTS

Features .............................................................................................. 1

 

Applications....................................................................................... 1

 

Product Overview............................................................................. 1

 

Revision History ............................................................................... 2

 

Functional Block Diagram .............................................................. 3

 

Specifications..................................................................................... 4

 

Performance Parameters ............................................................. 4

 

Timing Specifications .................................................................. 9

 

Timing Diagrams........................................................................ 10

 

Absolute Maximum Ratings.......................................................... 12

 

Thermal Resistance .................................................................... 12

 

Thermal Conditions................................................................... 12

 

ESD Caution................................................................................ 12

 

Pin Configuration and Function Descriptions........................... 13

 

Typical Performance Characteristics ........................................... 16

 

Terminology .................................................................................... 18

 

Pin Functions .................................................................................. 19

 

SDIN0, SDIN1, SDIN2, and SDIN3/SPDIF_IN0................... 19

 

LRCLK0, BCLK0, LRCLK1, BCLK1, LRCLK2, and BCLK2 19

 

SDO0/AD0 .................................................................................. 19

 

SPDIF_OUT (SDO1) ................................................................. 19

 

MCLKI/XIN ................................................................................ 19

 

XOUT........................................................................................... 19

 

MCLK_OUT ............................................................................... 19

 

SDA............................................................................................... 19

 

SCL ............................................................................................... 20

 

MUTE .......................................................................................... 20

 

RESET .......................................................................................... 20 

AUXIN1L, AUXIN2L, AUXIN1R, and AUXIN2R................ 20

 

AUXOUT1L, AUXOUT2L, AUXOUT3L, AUXOUT4L,

AUXOUT1R, AUXOUT2R, AUXOUT3R, and AUXOUT4R

....................................................................................................... 20

 

HPOUT1L, HPOUT2L, HPOUT1R, and HPOUT2R .......... 20

 

PLL_LF......................................................................................... 20

 

VREF............................................................................................ 20

 

FILTA and FILTD....................................................................... 20

 

PWM1A, PWM1B, PWM2A, PWM2B, PWM3A, PWM3B,

PWM4A, and PWM4B.............................................................. 20

 

PWM_READY ........................................................................... 20

 

AVDD .......................................................................................... 20

 

DVDD.......................................................................................... 20

 

ODVDD....................................................................................... 20

 

DGND.......................................................................................... 20

 

AGND .......................................................................................... 20

 

ODGND ...................................................................................... 20

 

SIF_REFP, SIF_REFCM, and SIF_REFN ................................ 20

 

SIF_IN1 and SIF_IN2 ................................................................ 20

 

SIF_PGA_REF ............................................................................ 20

 

ISET.............................................................................................. 20

 

Functional Descriptions ................................................................ 21

 

SIF Processor............................................................................... 21

 

Master Clock Oscillator............................................................. 21

 

I2C Interface ................................................................................ 22

 

ADC Inputs ................................................................................. 22

 

I2S Digital Audio Inputs ............................................................ 22

 

DAC Voltage Outputs ................................................................ 23

 

PWM Outputs ............................................................................ 24

 

Headphone Outputs................................................................... 24

 

I2S Digital Audio Outputs ......................................................... 24

 

S/PDIF Input/Output................................................................. 25

 

Hardware Mute Control ............................................................ 25

 

Audio Processor ......................................................................... 25

 

Graphical Programming Environment ................................... 25

 

Application Layer ....................................................................... 25

 

Loading a Custom Audio Processing Flow............................. 26

 

Outline Dimensions ....................................................................... 28

 

Ordering Guide .......................................................................... 28

 

REVISION HISTORY

7/09—Rev. A to Rev. B

Added Advantiv Logo ...................................................................... 1

Change to PWM Outputs Section................................................ 24

Change to Hardware Mute Control, Graphical Programming

Environment, and Application Layer Sections........................... 25

Changes to Ordering Guide .......................................................... 28

11/08—Revision A: Initial Version