STM32F100RC datasheet(76/98 Pages) STMICROELECTRONICS

76 / 98 page

Electrical characteristics

STM32F100xC, STM32F100xD, STM32F100xE

76/98

Doc ID 15081 Rev 7

Table 48.

I2C characteristics

Symbol

Parameter

Standard mode I2C(1)

Guaranteed by design, not tested in production.

Fast mode I2C(1)(2)

fPCLK1 must be at least 2 MHz to achieve standard mode I

2C frequencies. It must be at least 4 MHz to

achieve fast mode I2C frequencies. It must be a multiple of 10 MHz to reach the 400 kHz maximum I2C

fast mode clock.

Unit

Min

Max

Min

Max

tw(SCLL)

SCL clock low time

4.7

1.3

µs

tw(SCLH)

SCL clock high time

4.0

0.6

tsu(SDA)

SDA setup time

250

100

th(SDA)

SDA data hold time

900(3)

The maximum Data hold time has only to be met if the interface does not stretch the low period of SCL

signal.

tr(SDA)

tr(SCL)

SDA and SCL rise time

1000

300

tf(SDA)

tf(SCL)

SDA and SCL fall time

300

th(STA)

Start condition hold time

4.0

0.6

µs

tsu(STA)

Repeated Start condition setup

time

4.7

0.6

tsu(STO)

Stop condition setup time

4.0

0.6

µs

tw(STO:STA)

Stop to Start condition time (bus

free)

4.7

1.3

µs

Capacitive load for each bus line

400

STM32F100RC 数据表(PDF) 76 Page - STMicroelectronics

STM32F100RC 数据表(HTML) 76 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98

数据表下载