AD8400ARZ100 datasheet(5/32 Pages) AD

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AD8400/AD8402/AD8403

Rev. E | Page 5 of 32

Parameter

Symbol

Conditions

Min

Typ1

Max

Unit

DYNAMIC CHARACTERISTICS6, 10

Bandwidth −3 dB

BW_10 K

R = 10 kΩ

600

kHz

Total Harmonic Distortion

THDW

VA = 1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz

0.003

VW Settling Time

VA = VDD, VB = 0 V, ±1% error band

μs

Resistor Noise Voltage

eNWB

RWB = 5 kΩ, f = 1 kHz, RS = 0

nV/√Hz

Crosstalk11

VA = VDD, VB = 0 V

−65

1 Typical represents average readings at 25°C and VDD = 5 V.

2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See the test circuit in Figure 38.

IW = 50 μA for VDD = 3 V and IW = 400 μA for VDD = 5 V for the 10 kΩ versions.

3 VAB = VDD, wiper (VW) = no connect.

4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.

DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. See the test circuit in Figure 37.

5 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.

6 Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining

resistor terminals are left open circuit.

7 Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.

8 Worst-case supply current is consumed when the input logic level is at 2.4 V, a standard characteristic of CMOS logic. See Figure 28 for a plot of IDD vs. logic voltage.

9 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

10 All dynamic characteristics use VDD = 5 V.

11 Measured at a VW pin where an adjacent VW pin is making a full-scale voltage change.

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