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PD70F3555 数据表(PDF) 87 Page - Renesas Technology Corp |
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PD70F3555 数据表(HTML) 87 Page - Renesas Technology Corp |
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87 / 88 page ![]() 87 R01DS0141ED0100 Data Sheet Chapter 10 Definition of terms (7) Integral linearity error This indicates the degree to which the conversion characteristic shifts from the ideal linearity, and indicates the maximum value of the difference between the actually measured value and the ideal linearity where the zero-scale error and full-scale error are 0. Figure 10-6 Integral linearity error (8) Conversion time This is the time from when an analog voltage is input until digital output is produced. The conversion time in the characteristics table includes sampling time. (9) Sampling time This is the time during which the analog switch is on to input the analog voltage to the sample & hold circuit. (10) A/D start time This is the time from the A/D conversion trigger to the start of A/D conversion. Ideal linearity 1………1 0………0 Integral linearity error Analog input AVREFP AVREFM |
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