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STM8AF5269 数据表(PDF) 38 Page - STMicroelectronics |
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STM8AF5269 数据表(HTML) 38 Page - STMicroelectronics |
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38 / 110 page  Memory and register map STM8AF52/62xx, STM8AF51/61xx 38/110 Doc ID 14395 Rev 9 7 Memory and register map 7.1 Memory map Figure 7. Register and memory map Table 14. Memory model 128K Flash program memory size Flash program memory end address RAM size RAM end address Stack roll-over address 128K 0x00 27FFF 6K 0x00 17FF 0x00 1400 96K 0x00 1FFFF 0x00 17FF 0x00 1400 64K 0x00 17FFF 0x00 17FF 0x00 1400 48K 0x00 13FFF 3K 0x00 0BFF n/a(1) 1. If the device contains the super set silicon (salestype contains SSS), the roll-over address is the same as on the 128K device. For more information on stack handling refer to the “Memory and register map” section in the reference manual RM0016. For more information on salestype composition, refer to section 13 in the present document. 32K 0x00 0FFFF 6K 0x00 17FF 0x00 1400 Up to 2 Kbytes data EEPROM Option bytes HW registers 2 Kbytes boot ROM CPU/SWIM/Debug/ITC registers IT vectors Up to 128 Kbytes 00 0000 RAM end address 00 4000 00 4800 00 5000 00 5800 00 6000 00 6800 00 7F00 00 8000 Memory end address 00 8080 Reserved Reserved Stack Up to 6 Kbytes RAM 00 4900 Reserved Flash program memory |
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