MCR03EZPFX1002 datasheet(13/32 Pages) IRF

13 / 32 page

Rev 16.0

PD-97660

IR3831WMPbF

Soft-Start

The IR3831W has a programmable soft-start to

control the output voltage rise and limit the

current surge at the start-up. To ensure correct

start-up, the soft-start sequence initiates when

the Enable and Vcc rise above their UVLO

thresholds and generate the Power On Ready

(POR) signal. The internal current source

(typically 20uA) charges the external capacitor

ss linearly from 0V to 3V. Figure 6 shows the

waveforms during the soft start.

The start up time can be estimated by:

During the soft start the OCP is enabled to

protect the device for any short circuit and over

current condition.

Pre-Bias Startup

IR3831W is able to start up into pre-charged

output,

which

prevents

oscillation

and

disturbances of the output voltage.

The output starts in asynchronous fashion and

keeps the synchronous MOSFET off until the first

gate signal for control MOSFET is generated.

Figure 4 shows a typical Pre-Bias condition at

start up.

The synchronous MOSFET always starts with a

narrow pulse width and gradually increases its

duty cycle with a step of 25%, 50%, 75% and

100% until it reaches the steady state value. The

number

of these startup pulses for the

synchronous MOSFET is internally programmed.

Figure 5 shows a series of 32, 16, 8 startup

pulses.

Fig. 5. Pre-Bias startup pulses

Fig. 6. Theoretical operation waveforms

during soft-start

(1)

start

Fig. 4. Pre-Bias startup

Fig. 3c. Recommended startup sequence,

Sequenced operation

Figure 3c. shows the recommended startup

sequence for tracking operation of IR3831W with

Enable used as logic input.

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