USB2422SLASHMJ datasheet(23/51 Pages) SMSC

23 / 51 page

2-Port USB 2.0 Hi-Speed Hub Controller

Datasheet

SMSC USB2422

Revision 1.0 (06-04-13)

DATASHEET

Figure 4.3 Block Read

4.3.2.3

Invalid Protocol Response Behavior

Note that any attempt to update registers with an invalid protocol will not be updated. The only valid

protocols are write block and read block (described above), where the hub only responds to the 7-bit

hardware selected slave address (0101100b).

4.3.3

Slave Device Timeout

Devices in a transfer can abort the transfer in progress and release the bus when any single clock low

interval exceeds 25 ms (TTIMEOUT, MIN). The master must detect this condition and generate a stop

condition within or after the transfer of the interrupted data byte. Slave devices must reset their

communication and be able to receive a new START condition no later than 35 ms (TTIMEOUT, MAX).

Note: Some simple devices do not contain a clock low drive circuit; this simple kind of device typically

resets its communications port after a start or stop condition. The slave device timeout must

be implemented.

4.3.4

Stretching the SCLK Signal

The hub supports stretching of the SCLK by other devices on the SMBus. However, the hub does not

stretch the SCLK.

4.3.5

SMBus Timing

The SMBus slave interface complies with the SMBus Specification Revision 1.0 [2]. See Section 2.1,

AC Specifications on page 3 for more information.

4.3.6

Bus Reset Sequence

The SMBus slave interface resets and returns to the idle state upon a START condition followed

immediately by a STOP condition.

4.3.7

SMBus Alert Response Address

The SMBALERT# signal is not supported by the hub.

Slave Address

...

Byte Count = N

Data byte 2

Data byte 1

Data byte N

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