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USB2422/MJ 数据表(PDF) 31 Page - SMSC Corporation

部件名 USB2422/MJ
功能描述  2-Port USB 2.0 Hi-Speed Hub Controller
PDF  51 Pages
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制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation

USB2422/MJ 数据表(HTML) 31 Page - SMSC Corporation

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2-Port USB 2.0 Hi-Speed Hub Controller
Datasheet
SMSC USB2422
31
Revision 1.0 (06-04-13)
DATASHEET
4.4.11
Port Disable for Self-Powered Operation Register (PDS)
4.4.12
Port Disable for Bus-Powered Operation Register (PDB)
Address:
0Ah
Size:
8 bits
BITS
DESCRIPTION
TYPE
DEFAULT
7:0
Port Disable Self-Powered (PORT_DIS_SP)
Disables 1 or more ports.
0 = port is available
1 = port is disabled
During Self-Powered operation, when PRTMAP_EN = '0', this selects the
ports which will be permanently disabled, and are not available to be
enabled or enumerated by a Host Controller. The ports can be disabled in
any order, the internal logic will automatically report the correct number of
enabled ports to the USB Host, and will reorder the active ports in order to
ensure proper function.
When using the internal default option, the PRT_DIS[1:0] pins will disable
the appropriate ports.
Bit 7= Reserved
Bit 6= Reserved
Bit 5= Reserved
Bit 4= Reserved
Bit 3= Reserved
Bit 2= Port 2 Disable
Bit 1= Port 1 Disable
Bit 0= Reserved
R/W
00h
Address:
0Bh
Size:
8 bits
BITS
DESCRIPTION
TYPE
DEFAULT
7:0
Port Disable Bus-Powered (PORT_DIS_BP)
Disables 1 or more ports.
0 = port is available
1 = port is disabled
During Bus-Powered operation, when PRTMAP_EN = '0', this selects the
ports which will be permanently disabled, and are not available to be
enabled or enumerated by a Host Controller. The ports can be disabled in
any order, the internal logic will automatically report the correct number of
enabled ports to the USB Host, and will reorder the active ports in order to
ensure proper function.
When using the internal default option, the PRT_DIS[1:0] pins will disable
the appropriate ports.
Bit 7= Reserved
Bit 6= Reserved
Bit 5= Reserved
Bit 4= Reserved
Bit 3= Reserved
Bit 2= Port 2 Disable
Bit 1= Port 1 Disable
Bit 0= Reserved
R/W
00h



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